Job DescriptionJob Description Senior Cyber FPGA Design Verification EngineerDedham, MAUp to $190,000 yearlyDirect PlacementSign on Bonus - $3,000.00RELOCATION ASSISTANCE AVAILABLE As a Senior Cyber FPGA Design Verification Engineer, you’ll be a member of a cross functional team responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products.We encourage you to apply if you have any of these skills or experiences: Experience with OVM / UVM design verification methodology: bash/csh, Perl, TCL, Python or similar scripting ; VHDL or similar hardware description . What sets you apart: n
- n
- Experience defining verification methodology for complex FPGAs. n
- Ability to analyze requirements, create test plan, build and set up scalable simulation environments from the ground up using SystemVerilog/UVM n
- Familiarity with testing complex designs, code coverage, functional coverage, assertions. n
- Ability to work in a dynamic environment that includes working with changing needs and requirements. n
- FPGA/ASIC design experience is a plus. n
- Familiarity with Xilinx FPGA & Questa Advanced Functional Verification tools is a plus. n
- Team player who thrives in collaborative environments and revels in team success n
Our Commitment to You: n
- n
- An exciting career path with opportunities for continuous learning and development. n
- Research oriented work, alongside award winning teams developing practical solutions for our nation’s security n
- Flexible schedules with every other Friday off work, if desired (9/80 schedule) n
- Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more n
Requirements : n
- n
- Bachelor’s degree n
- Secret clearance n
- Willingness to travel occasionally n
We are an EOE.If interested, please contact Thomas Masters 866-868-4473 Ext.