Mixed-Signal IC Layout Lead
nFull-time + Benefits
nRichardson, Texas (onsite/hybrid)
nUS Citizen or US Permanent Resident
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nResponsibilities:
n• Chip-level integration including IP blocks, digital blocks, and analog blocks
n• Chip-level verification including DRC/LVS/EMIR, parasitic extraction, and metal density fill
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nRequired Experience:
n• 10+ years industry experience in IC layout
n• Solid experience in Cadence Virtuoso/Synopsys Custom Compiler Layout tool and verification tools, Calibre/PVS/IC Validator
n• Experience in LVS and DRC
n• Good understanding of the semiconductor foundry process flow
n• BSEE or Associate of Applied Science (ASS) degree in IC Layout Design
n• Strong communication and customer service skills, ability to work under time constraints, attention to details, reading layout specifications
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nIC MASK LAYOUT DESIGN GROUP on LinkedIn:
Chelsea Search Group