eTeam
Job Title: Silicon DD Engineer IV
Location: Onsite - Redmond, WA (Sunnyvale, CA also considered)
Duration: 12 Months (Potential for extension)
Role:
• Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred)
• Develop and maintain build/simulation scripts
• Write test cases using Python to validate our design
• Create software interfaces from our FPGA-based systems to Windows and Linux systems software at the HAL layer
• Collaborate in a team environment across multiple engineering disciplines and with researchers
Skills Minimum:
• 5+ years of FPGA design experience using Verilog, SystemVerilog
• 5+ years of experience in AMD/Xilinx FPGA design (Versal and Kintex/Virtex UltraScale+ desired, 7-series minimum)
• Experience using industry standard Xilinx Vivado to bring up initial system, integrate peripheral components, and test and debug design
• Programming experience in one or more scripting languages: Python, tcl, shell scripts, or equivalent EDA tool scripting languages
Preferred:
• 10+ years of experience in FPGA design and development
• Experience with RTL to GDS flows on modern processes like TSClient N7
• Experience with serial interfaces like SPI, I2C and video/camera interfaces like MIPI DSI/CSI
• Proven track record of successfully deploying FPGA solutions across production systems or research prototypes
• Programming experience in C and/or C++
• Experience developing accompanying firmware to exercise and drive FPGA prototypes
Must Have:
Experience in System Verilog and VHDL is acceptable
Proficient or expert in Xilinx/FPGAs
FPGA verification (Simulation verification)
Nice to Have:
Python scripting for test use cases
SIC development familiarity
Common video and camera standards (DSI and CSI)
Education
• Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience
Location: Onsite - Redmond, WA (Sunnyvale, CA also considered)
Duration: 12 Months (Potential for extension)
Role:
• Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred)
• Develop and maintain build/simulation scripts
• Write test cases using Python to validate our design
• Create software interfaces from our FPGA-based systems to Windows and Linux systems software at the HAL layer
• Collaborate in a team environment across multiple engineering disciplines and with researchers
Skills Minimum:
• 5+ years of FPGA design experience using Verilog, SystemVerilog
• 5+ years of experience in AMD/Xilinx FPGA design (Versal and Kintex/Virtex UltraScale+ desired, 7-series minimum)
• Experience using industry standard Xilinx Vivado to bring up initial system, integrate peripheral components, and test and debug design
• Programming experience in one or more scripting languages: Python, tcl, shell scripts, or equivalent EDA tool scripting languages
Preferred:
• 10+ years of experience in FPGA design and development
• Experience with RTL to GDS flows on modern processes like TSClient N7
• Experience with serial interfaces like SPI, I2C and video/camera interfaces like MIPI DSI/CSI
• Proven track record of successfully deploying FPGA solutions across production systems or research prototypes
• Programming experience in C and/or C++
• Experience developing accompanying firmware to exercise and drive FPGA prototypes
Must Have:
Experience in System Verilog and VHDL is acceptable
Proficient or expert in Xilinx/FPGAs
FPGA verification (Simulation verification)
Nice to Have:
Python scripting for test use cases
SIC development familiarity
Common video and camera standards (DSI and CSI)
Education
• Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience