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Staff Design Verification Engineer - Austin, TX (Onsite Preferred)
Build low-power SoCs that power the future of AI at the edge.
Are you a verification engineer ready to push the boundaries of energy-efficient computing? Our client is building ultra-low-power SoCs that are shaping the next generation of intelligent devices-from wearables to smart home systems and beyond.
They're looking for a hands-on Staff Design Verification Engineer who thrives in a fast-paced, collaborative environment. If you've delivered silicon that runs right the first time-and you're passionate about verification across block, subsystem, and full-chip levels-this is your next mission.
Why This Role Matters:
Build low-power SoCs that power the future of AI at the edge.
Are you a verification engineer ready to push the boundaries of energy-efficient computing? Our client is building ultra-low-power SoCs that are shaping the next generation of intelligent devices-from wearables to smart home systems and beyond.
They're looking for a hands-on Staff Design Verification Engineer who thrives in a fast-paced, collaborative environment. If you've delivered silicon that runs right the first time-and you're passionate about verification across block, subsystem, and full-chip levels-this is your next mission.
Why This Role Matters:
- Join a team designing SoCs for AI inference and IoT-where every microwatt counts.
- Play a key role in verifying digital and mixed-signal logic, CPUs, DSPs, security IP, and low-power features.
- Work in a collaborative, innovative culture with meaningful ownership and visibility.
- Own DV tasks from planning to closure with minimal oversight.
- Architect reusable, scalable testbenches using SystemVerilog UVM .
- Build C-based libraries and test programs to enable robust SoC-level testing.
- Debug and resolve design issues using advanced tools and techniques.
- Drive functional and code coverage goals and develop regression infrastructure.
- Collaborate with design, architecture, and firmware teams throughout the lifecycle.
- 8-12 years in digital/mixed-signal SoC verification.
- Deep experience with SystemVerilog, UVM, Verilog, C/C++ , and scripting (Python/Perl).
- Track record of delivering multiple successful chips to spec.
- Solid understanding of ARM or RISC-V , AMBA AXI/AHB/APB , and low-power design techniques.
- Familiarity with MIPI, Crypto, OTP, DSPs , and AI inference is a strong plus.
- Bachelor's or Master's in EE/CE or related field.
- Local candidates preferred (Austin, TX).
- Visa sponsorship is not available for this role.