Senior RTL Design & Digital Logic Engineer

Job Title: Senior RTL Design & Digital Logic Engineer
Location: Onsite - Atlanta, GA
Experience: 10+ Years
Job Description:
We are seeking a highly experienced RTL Design Engineer with a strong background in digital logic design for a full-time onsite role in Atlanta. The ideal candidate will contribute to the architecture, RTL coding, verification, and integration of high-performance digital blocks for SoCs and ASICs.
Key Responsibilities:

• Develop and optimize RTL for complex digital systems (Verilog/SystemVerilog).
• Drive microarchitecture design, logic implementation, and timing closure.
• Collaborate with verification, DFT, physical design, and firmware teams.
• Perform logic synthesis and support physical implementation teams.
• Deliver high-quality, reusable, and scalable RTL designs.

Requirements:

• 10+ years of experience in RTL and digital logic design.
• Expertise in Verilog/SystemVerilog, synthesis, and timing analysis.
• Strong understanding of SoC architecture and digital subsystems.
• Experience with EDA tools (Synopsys/Cadence).
• Excellent debugging and problem-solving skills.