Analog Devices
Senior Engineer, Process Sustaining Engineering
Provides technical and sustaining engineering support in a manufacturing area. Yield Improvement for Fab Electrical Test and Probe Parametric Test for Bipolar, CMOS, DMOS, RF, and BICMOS products and technologies. Propose and implement process changes for improved yield or to facilitate fab modernization. Qualify new products and review process changes and new tool qualification for improved resiliency. Develops and conducts statistical analysis such as Design of Experiments (DOE) and Statistical Process Control (SPC) targeting physical cause of failure for yield loss and improving quality. Interacts with product design and development personnel to ensure that processes and designs are compatible. Requirements: Bachelors or Masters degree in ChemE, Mat Sci, EE, Physics, Chemistry or a related discipline. 4+ years of direct semiconductor industry experience with Yield improvement and Integration process. Advanced understanding of statistical process control (SPC) and engineering statistics. Excellent written, verbal, and presentation skills. Applicants must be able to train, influence, and motivate coworkers with educations ranging from GED to PhD and experience ranging from new hire to SVP. Ability to drive best in class quality, productivity, throughput, environmental performance, process robustness, cost, and manufacturability within own organization. Analyze Electrical test and Sort Yield data to identify key issues across a broad range of areas and effectively communicate recommendations to cross-functional teams Drive solution development, change management, and monitor effectiveness of any new process implementation or changes. Responsible to prepare, analyze and present key operational metrics, performance against targets and trends to senior management, including improvement recommendations and solutions Coordinate and collaborate with key groups like IT, Supply Chain Management, Process Engineering and other site support groups to meet internal and external customer demand Partner directly with manufacturing modules to optimize production for bottleneck toolsets and drive projects to increase efficiency Good understanding of device Physics, process integration knowledge and testing methodology to manage any process excursion and recommending material disposition. Knowledge of device layout, design and circuit analysis to identify weakness of the process and recommending innovative process improvement Recommend failure analysis method for Electrical and sort yield performance issue Fab SPC process control and aligning inline process control specs to Electrical parameter specs Interface with Product Engineering and Quality Assurance for qualification of new products, new processes, and process changes. Preferred: 4+ years of direct semiconductor industry experience in yield improvement and process integration areas. Significant knowledge of device physics as well as bipolar and MOS device integration. Strong data analysis skills, and knowledge of various failure analysis methods Advanced statistics, problem solving mindset, SQL, Exensio Data Analytic Software tool, KLA Klarity ACE analytic software tool Able to occasionally travel domestically and internationally as needed. Excellent organizational skills to manage multiple projects across geographically disbursed teams EEO is the Law: Notice of Applicant Rights Under the Law The expected wage range for a new hire into this position is $94,000 to $129,250. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.
Provides technical and sustaining engineering support in a manufacturing area. Yield Improvement for Fab Electrical Test and Probe Parametric Test for Bipolar, CMOS, DMOS, RF, and BICMOS products and technologies. Propose and implement process changes for improved yield or to facilitate fab modernization. Qualify new products and review process changes and new tool qualification for improved resiliency. Develops and conducts statistical analysis such as Design of Experiments (DOE) and Statistical Process Control (SPC) targeting physical cause of failure for yield loss and improving quality. Interacts with product design and development personnel to ensure that processes and designs are compatible. Requirements: Bachelors or Masters degree in ChemE, Mat Sci, EE, Physics, Chemistry or a related discipline. 4+ years of direct semiconductor industry experience with Yield improvement and Integration process. Advanced understanding of statistical process control (SPC) and engineering statistics. Excellent written, verbal, and presentation skills. Applicants must be able to train, influence, and motivate coworkers with educations ranging from GED to PhD and experience ranging from new hire to SVP. Ability to drive best in class quality, productivity, throughput, environmental performance, process robustness, cost, and manufacturability within own organization. Analyze Electrical test and Sort Yield data to identify key issues across a broad range of areas and effectively communicate recommendations to cross-functional teams Drive solution development, change management, and monitor effectiveness of any new process implementation or changes. Responsible to prepare, analyze and present key operational metrics, performance against targets and trends to senior management, including improvement recommendations and solutions Coordinate and collaborate with key groups like IT, Supply Chain Management, Process Engineering and other site support groups to meet internal and external customer demand Partner directly with manufacturing modules to optimize production for bottleneck toolsets and drive projects to increase efficiency Good understanding of device Physics, process integration knowledge and testing methodology to manage any process excursion and recommending material disposition. Knowledge of device layout, design and circuit analysis to identify weakness of the process and recommending innovative process improvement Recommend failure analysis method for Electrical and sort yield performance issue Fab SPC process control and aligning inline process control specs to Electrical parameter specs Interface with Product Engineering and Quality Assurance for qualification of new products, new processes, and process changes. Preferred: 4+ years of direct semiconductor industry experience in yield improvement and process integration areas. Significant knowledge of device physics as well as bipolar and MOS device integration. Strong data analysis skills, and knowledge of various failure analysis methods Advanced statistics, problem solving mindset, SQL, Exensio Data Analytic Software tool, KLA Klarity ACE analytic software tool Able to occasionally travel domestically and internationally as needed. Excellent organizational skills to manage multiple projects across geographically disbursed teams EEO is the Law: Notice of Applicant Rights Under the Law The expected wage range for a new hire into this position is $94,000 to $129,250. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.