AMD
Join to apply for the
PCIe Verification Engineer
role at
AMD Join to apply for the
PCIe Verification Engineer
role at
AMD Get AI-powered advice on this job and more exclusive features. This range is provided by AMD. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more. Base pay range
$191,040.00/yr - $286,560.00/yr WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
The Role
As a verification engineer in the AECG Group, you will help bring to life cutting-edge FPGA, ASICs for variety of target customers.As a member of the front-end design/integration team, you will work closely with the architecture, IP design, PD teams, and product engineers to achieve first pass silicon success.
The Person
You have a passion for modern, complex IP architectures, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
Key Responsiblities
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Develop test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Code IP or SS level UVM based testbenches, verification components - monitors, scoreboard, checkers Build the directed and random verification tests Run regressions, debug test failures towards ensuring high design functional, performance and implementation quality
Preferred Experience
Proficient in IP level ASIC verification Expert in Verilog, System Verilog, Object Oriented programming Developing UVM based verification frameworks and testbenches, Scripting and automation of verification processes and flows Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process Good Computer Architecture, systems knowledge Comfortable in python / perl and editing / maintaining scripts Exposure to leadership or mentorship is an asset Experience working in a team environment through the ASIC Project lifecycle from Planning to Tape Out Experience with PCIe, CXL, NVMe or ethernet protocols Strong communication skills and the ability to work independently as well as in a cross-site team environment
Academic Credentials
Bachelors or Masters degree in computer engineering/Electrical Engineering
LOCATION:
San Jose, CA
Benefits offered are described:
AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at AMD by 2x Get notified about new Validation Engineer jobs in
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#J-18808-Ljbffr
PCIe Verification Engineer
role at
AMD Join to apply for the
PCIe Verification Engineer
role at
AMD Get AI-powered advice on this job and more exclusive features. This range is provided by AMD. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more. Base pay range
$191,040.00/yr - $286,560.00/yr WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
The Role
As a verification engineer in the AECG Group, you will help bring to life cutting-edge FPGA, ASICs for variety of target customers.As a member of the front-end design/integration team, you will work closely with the architecture, IP design, PD teams, and product engineers to achieve first pass silicon success.
The Person
You have a passion for modern, complex IP architectures, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
Key Responsiblities
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Develop test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Code IP or SS level UVM based testbenches, verification components - monitors, scoreboard, checkers Build the directed and random verification tests Run regressions, debug test failures towards ensuring high design functional, performance and implementation quality
Preferred Experience
Proficient in IP level ASIC verification Expert in Verilog, System Verilog, Object Oriented programming Developing UVM based verification frameworks and testbenches, Scripting and automation of verification processes and flows Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process Good Computer Architecture, systems knowledge Comfortable in python / perl and editing / maintaining scripts Exposure to leadership or mentorship is an asset Experience working in a team environment through the ASIC Project lifecycle from Planning to Tape Out Experience with PCIe, CXL, NVMe or ethernet protocols Strong communication skills and the ability to work independently as well as in a cross-site team environment
Academic Credentials
Bachelors or Masters degree in computer engineering/Electrical Engineering
LOCATION:
San Jose, CA
Benefits offered are described:
AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at AMD by 2x Get notified about new Validation Engineer jobs in
San Jose, CA . Menlo Park, CA $122,000.00-$169,000.00 2 weeks ago San Jose, CA $141,280.00-$211,920.00 12 hours ago Quality Management System Engineer - Operations
Santa Clara, CA $108,000.00-$172,500.00 21 hours ago San Jose, CA $100,000.00-$130,000.00 2 weeks ago San Jose, CA $90,000.00-$120,000.00 1 month ago Verification and Validation Engineer/Senior V&V Engineer
San Mateo County, CA $120,000.00-$150,000.00 14 hours ago San Jose, CA $159,800.00-$202,300.00 2 weeks ago Verification and Validation Engineer/Senior V&V Engineer
Santa Clara, CA $120,000.00-$150,000.00 1 day ago Verification and Validation Engineer/Senior V&V Engineer
Fremont, CA $120,000.00-$150,000.00 14 hours ago Fremont, CA $90,000.00-$100,000.00 3 weeks ago Fremont, CA $100,000.00-$125,000.00 5 days ago Senior Supplier Quality Engineer, Mechanicals
Sunnyvale, CA $138,000.00-$202,000.00 2 weeks ago Test and Validation Engineer II, Drive Unit Test and Validation
Fremont, CA $90,000.00-$100,000.00 3 weeks ago Systems Validation Engineer, Efficiency & EV Systems
San Jose, CA $120,000.00-$150,000.00 3 days ago Supplier Quality Engineer, Body in White
Milpitas, CA $120,000.00-$170,000.00 3 weeks ago Sr. Test and Validation Engineer, Drive Unit Test and Validation
Manufacture and Test Engineer, Rack Integration
Sunnyvale, CA $115,000.00-$166,000.00 6 days ago San Jose, CA $76,100.00-$138,900.00 1 day ago Redwood City, CA $112,700.00-$155,000.00 1 week ago Senior Test and Validation Engineer, Drive Unit Test and Validation
San Jose, CA $130,000.00-$178,000.00 5 days ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr