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GlobalFoundries

3D Heterogeneous Integration Design Enablement Engineer (2025 New College Gradua

GlobalFoundries, Round Lake, New York, United States, 12151

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R&D Design Enablement Engineer

GlobalFoundries Fab8 is seeking a motivated R&D design enablement engineer to become part of our state-of-the-art 300mm fabrication facility in Malta, New York. This role will entail 3D heterogeneous integration (3DHI) design enablement to enable our next-generation advanced packaging R&D efforts, which include wafer-to-wafer bonding, die-to-wafer bonding, TSV/TOV and interposer development. Essential Responsibilities

Publish design manual (DM) specifications based on failure modes identified for packaging required by the product lines in partnership with the unit process and R&D engineers. DM is a collection of all technology restrictions (geometry rules, electrical rules, etc.) that must be followed for an integrated circuit (IC) design to be manufacturable. Advanced packaging liaison to the DM and PDK (Process Design Kit) teams to translate packaging requirements to a device enablement specification covering: design rules, library device (TSV) layouts, layout vs schematic (LVS) requirements, device model terminals. Develop expertise in drafting test vehicle content specifications and the associated tapeout process (including mask reviews). Develop expertise in drafting test specifications for test vehicle content (macros); engage with the test teams (inline and lab) to ensure alignment on test requests. Collaborate with vendors and OSATs (Outsourced Assembly and Test) on design (test vehicles, masks). Facilitate advanced packaging design interactions between the product lines/fab teams and customers. Work and collaborate with other teams regarding different assignments as needed. Other Responsibilities

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Other duties as assigned by manager. Required Qualifications

Education

Bachelor's or Master's in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science or related field from an accredited degree program. Must have at least an overall 3.0 GPA and proven good academic standing. Language Fluency - English (Written & Verbal). Travel - Up to 10%. Preferred Qualifications

PhD education level preferred. Prior-related internship or co-op experience in design or EDA/design enablement. Fundamental knowledge of semiconductor packaging process modules and integration. Demonstrated prior leadership experience in the workplace, school projects, competitions, etc. Project management skills, i.e. the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity. Strong written and verbal communication skills. Strong planning & organizational skills. Expected Salary Range $65,400.00 - $145,800.00. The exact salary will be determined based on qualifications, experience and location. If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations. GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential.