Apple Inc.
CAD Design Verification Methodology Engineer
Apple Inc., Cupertino, California, United States, 95014
CAD Design Verification Methodology Engineer
Cupertino, California, United States | Hardware Description
Join our CAD team to develop and enhance sophisticated software systems for regression-testing Apple’s silicon designs, ensuring high-quality chip production. Your expertise will influence the design of next-generation regression systems. Collaborate closely with EDA vendors to incorporate new tool capabilities and resolve issues, supporting Apple’s chip design engineering efforts. Minimum Qualifications
BS degree plus 10 years of relevant experience Experience in developing or maintaining regression systems for RTL Proficiency in Python programming Preferred Qualifications
Experience with TCL or Perl Experience collaborating with DV teams Ability to implement new functionalities and optimize existing methods MSEE, CE, or CS degree preferred Knowledge of Verilog and SystemVerilog; VHDL familiarity a plus Experience with Synopsys VCS, XCelium, or ModelSim Good communication skills and prior customer support experience preferred Experience with scripting and build systems is a plus Familiarity with Verdi and Indago is advantageous Knowledge of C and C++ is beneficial Apple offers a competitive salary range of $181,100 to $318,400, based on experience and qualifications, along with comprehensive benefits, stock options, and educational reimbursement. Eligibility for bonuses, stock purchase plans, and relocation assistance may apply. Learn more about Apple Benefits. Apple is an equal opportunity employer committed to diversity and inclusion, providing equal opportunity regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics. Learn more about your EEO rights as an applicant.
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Cupertino, California, United States | Hardware Description
Join our CAD team to develop and enhance sophisticated software systems for regression-testing Apple’s silicon designs, ensuring high-quality chip production. Your expertise will influence the design of next-generation regression systems. Collaborate closely with EDA vendors to incorporate new tool capabilities and resolve issues, supporting Apple’s chip design engineering efforts. Minimum Qualifications
BS degree plus 10 years of relevant experience Experience in developing or maintaining regression systems for RTL Proficiency in Python programming Preferred Qualifications
Experience with TCL or Perl Experience collaborating with DV teams Ability to implement new functionalities and optimize existing methods MSEE, CE, or CS degree preferred Knowledge of Verilog and SystemVerilog; VHDL familiarity a plus Experience with Synopsys VCS, XCelium, or ModelSim Good communication skills and prior customer support experience preferred Experience with scripting and build systems is a plus Familiarity with Verdi and Indago is advantageous Knowledge of C and C++ is beneficial Apple offers a competitive salary range of $181,100 to $318,400, based on experience and qualifications, along with comprehensive benefits, stock options, and educational reimbursement. Eligibility for bonuses, stock purchase plans, and relocation assistance may apply. Learn more about Apple Benefits. Apple is an equal opportunity employer committed to diversity and inclusion, providing equal opportunity regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics. Learn more about your EEO rights as an applicant.
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