Apple
Wireless Soc Design Verification Engineer
As part of our team, you will have the opportunity to verify a set of complex SOCs. Our team integrates multiple sophisticated IP-level DV environments, crafts highly reusable best-in-class UVM Testbenches, implements effective coverage-driven and directed test cases, deploys new tools, and implements methodologies to improve quality of tape-out readiness. By collaborating with other product development groups across Apple, you can push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world! You will be able to learn all aspects of a large-scale SOC, different types of SOC architectures, many high-speed layered protocols, methodologies on low-power architecture, best-in-class DV methodology. You will be able to gain knowledge on wireless protocols, FW-HW interactions, complexities of multi-chip SOC debug architecture, etc. Minimum Qualifications
BS + 3 years of industry experience. Preferred Qualifications
Experience with ASIC DV.
Knowledge of HVL methodology (UVM/OVM) with the most recent experience in UVM.
Experience with formal verification.
Experience track record of working full ASIC cycle from concept to tape-out to bring-up.
Experience taping out large SOC systems with embedded processor cores.
Hands-on verification experience of PCIe, Bus Fabric, NOC, AHB, AXI, based bus architecture in a UVM environment.
In-depth knowledge and experience working with low power design, UPF integration, boot-up, power-cycling, HW/FW interaction verification.
Knowledge of Low Power Verification. Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses
including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
As part of our team, you will have the opportunity to verify a set of complex SOCs. Our team integrates multiple sophisticated IP-level DV environments, crafts highly reusable best-in-class UVM Testbenches, implements effective coverage-driven and directed test cases, deploys new tools, and implements methodologies to improve quality of tape-out readiness. By collaborating with other product development groups across Apple, you can push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world! You will be able to learn all aspects of a large-scale SOC, different types of SOC architectures, many high-speed layered protocols, methodologies on low-power architecture, best-in-class DV methodology. You will be able to gain knowledge on wireless protocols, FW-HW interactions, complexities of multi-chip SOC debug architecture, etc. Minimum Qualifications
BS + 3 years of industry experience. Preferred Qualifications
Experience with ASIC DV.
Knowledge of HVL methodology (UVM/OVM) with the most recent experience in UVM.
Experience with formal verification.
Experience track record of working full ASIC cycle from concept to tape-out to bring-up.
Experience taping out large SOC systems with embedded processor cores.
Hands-on verification experience of PCIe, Bus Fabric, NOC, AHB, AXI, based bus architecture in a UVM environment.
In-depth knowledge and experience working with low power design, UPF integration, boot-up, power-cycling, HW/FW interaction verification.
Knowledge of Low Power Verification. Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses
including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.