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Position Responsibilities Drive sales, post-delivery support for analog and mixed-signal IP based on FinFET & GAA technologies, ensuring seamless integration and optimal performance; Provide technical expertise and mentorship to junior circuit designers in the development of high-performance analog and mixed-signal IP, encompassing: Wide Range PLLs, Low-Jitter LC PLLs, Low-Voltage Spread Spectrum PLLs, High-Accuracy PVT Sensors, High-Speed Power Supply Sensors, Low-Voltage Bandgap Reference Generators, I/Os with ESD and EMI protection, Crystal (XTAL) Oscillator Circuits, Low-Offset Amplifiers developed using chopping and DEM techniques; Direct and oversee the layout design and perform post-layout validation of mixed-signal IPs, including PLLs, PVT Sensors, and I/Os; Manage development schedules and program timelines for mixed-signal IP projects, ensuring on-time delivery and customer satisfaction; and Participate in the recruitment, evaluation, and hiring of circuit design engineers. Position Requirements Master's degree (or foreign equivalent degree) in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline and two (2) years of experience as a Circuit Design Engineering Manager, Circuit Design Engineer, Senior Electronic Design Engineer, Circuit Design Engineer Intern or a related occupation. The required experience must include a minimum of two years of experience in the design and development of integrated circuits utilizing advanced CMOS architectures, specifically FinFET and GAA technologies. This experience must encompass the design and development of at least three (3) of the following Analog and Mixed-Signal IPs: Low Voltage Bandgap References. High accuracy PVT sensors. Low offset amplifiers using chopping and DEM techniques. High speed analog and digitized power supply sensors. I/O with ESD and EMI protection. XTAL Oscillator circuits. Wide range PLL, Low Voltage Spread Spectrum PLL, and Low Jitter LC PLL.

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