Kasmo Global
Validation Engineer - Senior (US)
Kasmo Global - San Francisco, California, United States, 94199
Work at Kasmo Global
Overview
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Overview
Spotlight call notes:
• Top skills: SerDes testing, Python, compliance, Signal Integrity, and data processing
• Looking for 5+ years of experience, but no more than 20 years
Validation Engineer - Senior (US)-
AMDJP00003634 Location: San Jose, CA - 100% onsite
As a SerDes V&C team member, you will be part of industry-leading engineering team that is developing validation and characteristics solutions for the cutting-edge generation of transceivers.
Successful candidates will work as part of a team on projects which may include: • Validating PMA (or PHY) blocks of transceivers • Developing automation testing scripts and scenarios • Running automation scripts or compliance test suites • Processing and reporting test results
Education Requirements • Bachelor's Degree in EE, CS or related fields with 5+ years of work experience, or, • Master's Degree in EE, CS or related fields with 3+ years of work experience
Qualifications • Hands-on experience with high-speed scope, BERTs, VNA and associated lab equipment for SERDES characterization • Experienced in Python and automation techniques • A team player with strong written and verbal skills • Experienced in C++, or FPGA design is a plus • Understanding board design, or experienced in Signal Integrity is a plus
AMDJP00003634 Location: San Jose, CA - 100% onsite
As a SerDes V&C team member, you will be part of industry-leading engineering team that is developing validation and characteristics solutions for the cutting-edge generation of transceivers.
Successful candidates will work as part of a team on projects which may include: • Validating PMA (or PHY) blocks of transceivers • Developing automation testing scripts and scenarios • Running automation scripts or compliance test suites • Processing and reporting test results
Education Requirements • Bachelor's Degree in EE, CS or related fields with 5+ years of work experience, or, • Master's Degree in EE, CS or related fields with 3+ years of work experience
Qualifications • Hands-on experience with high-speed scope, BERTs, VNA and associated lab equipment for SERDES characterization • Experienced in Python and automation techniques • A team player with strong written and verbal skills • Experienced in C++, or FPGA design is a plus • Understanding board design, or experienced in Signal Integrity is a plus