Apple Inc.
Cellular SOC Design Verification Engineer
Apple Inc., Sunnyvale, California, United States, 94087
Cellular SOC Design Verification Engineer
Do you have a passion for invention and self-challenge? This position offers you the opportunity to be part of one of the most innovative projects within Apple’s Silicon Engineering Group. As part of our team, you will lead and contribute to verifying sophisticated SOCs by integrating IP-level DV environments, crafting reusable UVM test benches, implementing coverage-driven and directed test cases, deploying new tools, and enhancing methodologies for tape-out readiness. Collaborate across Apple to push industry boundaries in cellular systems and improve the product experience worldwide. You will learn about large-scale SOCs, various architectures, high-speed protocols, low-power methodologies, DV techniques, verification on accelerated platforms, Cellular protocols, FW-HW interactions, and multi-chip SOC debug architectures. This role requires a versatile verification engineer comfortable with all aspects of SOC design verification, thriving in a dynamic, collaborative environment. Description
Understand high-efficiency SOC architecture, peripherals (SPI, I2C, UART, Timer, DMA), memory management, low power specs, multi-processor systems, DDR, PCIe, USB, PLL, power-up, and secure boot schemes. Develop and refine coverage-driven verification plans, create IP-level modules, sub-systems, and test infrastructures. Architect reusable UVM-based test benches, integrate VIPs, and work with cross-functional teams to verify the SOC design. Collaborate with DV methodology architects to improve verification flow. Minimum Qualifications
BS degree with at least 3 years of relevant experience. Experience in Object-Oriented Programming. Experience in Digital Design. Preferred Qualifications
MSEE, MSCS, or higher. Experience in Computer Architecture and Networking Protocols. Programming in SystemVerilog, Python, C++. Strong teamwork, communication, problem-solving skills, and a desire for diverse challenges. At Apple, compensation includes base pay, stock programs, benefits, and educational reimbursement. The pay range for this role is $147,400 to $272,100, depending on skills and experience. Benefits include medical, dental, retirement, discounts, educational support, bonuses, and relocation assistance. Note: Benefits and compensation are subject to eligibility and plan terms. Apple is an equal opportunity employer committed to inclusion and diversity. We promote equal opportunity regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics. Learn more about your EEO rights.
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Do you have a passion for invention and self-challenge? This position offers you the opportunity to be part of one of the most innovative projects within Apple’s Silicon Engineering Group. As part of our team, you will lead and contribute to verifying sophisticated SOCs by integrating IP-level DV environments, crafting reusable UVM test benches, implementing coverage-driven and directed test cases, deploying new tools, and enhancing methodologies for tape-out readiness. Collaborate across Apple to push industry boundaries in cellular systems and improve the product experience worldwide. You will learn about large-scale SOCs, various architectures, high-speed protocols, low-power methodologies, DV techniques, verification on accelerated platforms, Cellular protocols, FW-HW interactions, and multi-chip SOC debug architectures. This role requires a versatile verification engineer comfortable with all aspects of SOC design verification, thriving in a dynamic, collaborative environment. Description
Understand high-efficiency SOC architecture, peripherals (SPI, I2C, UART, Timer, DMA), memory management, low power specs, multi-processor systems, DDR, PCIe, USB, PLL, power-up, and secure boot schemes. Develop and refine coverage-driven verification plans, create IP-level modules, sub-systems, and test infrastructures. Architect reusable UVM-based test benches, integrate VIPs, and work with cross-functional teams to verify the SOC design. Collaborate with DV methodology architects to improve verification flow. Minimum Qualifications
BS degree with at least 3 years of relevant experience. Experience in Object-Oriented Programming. Experience in Digital Design. Preferred Qualifications
MSEE, MSCS, or higher. Experience in Computer Architecture and Networking Protocols. Programming in SystemVerilog, Python, C++. Strong teamwork, communication, problem-solving skills, and a desire for diverse challenges. At Apple, compensation includes base pay, stock programs, benefits, and educational reimbursement. The pay range for this role is $147,400 to $272,100, depending on skills and experience. Benefits include medical, dental, retirement, discounts, educational support, bonuses, and relocation assistance. Note: Benefits and compensation are subject to eligibility and plan terms. Apple is an equal opportunity employer committed to inclusion and diversity. We promote equal opportunity regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics. Learn more about your EEO rights.
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