Rivos Inc.
Join to apply for the
Silicon bringup and validation engineer
role at
Rivos Inc. Join to apply for the
Silicon bringup and validation engineer
role at
Rivos Inc. The Silicon Bringup and Validation Engineer is responsible for bringing up and validating the SOC subsystems in Rivos SOC design. This role requires a deep understanding of state-of-art SOC design in various aspects from physical design, logic, performance, power, and software. We have positions open in key components of the design such as Power Management, DDR/HBM, PCIe, CPU, and data accelerator. The tasks include test generation, test infrastructure setup, bringup planning and execution, validation plan development and execution. At this time, we plan to staff the technical leads or senior technical staff positions.
Responsibilities
As a lead, you will lead an engineering team responsible for designing, implementing and executing a subsystem silicon bringup plans, including functional and performance tests, to validate the subsystem for the silicon product to meet the product requirements. Collaborate with cross-functional teams including design, architecture, firmware, and software to ensure successful subsystem integration and validation. Work with vendors and partners to ensure successful subsystem bringup and validation, including reviewing and providing feedback on vendor documentation, and coordinating with vendor support teams. Debug and root-cause issues found during subsystem bringup and validation, and work with cross-functional teams to implement corrective actions. Drive continuous improvement of subsystem bringup and validation processes and methodologies, including automation, tool development, and documentation. Maintain up-to-date knowledge of the subsystem technology and industry trends.
Requirements
In-depth knowledge of architecture, microarchitecture, and software interface of the subsystem. Experienced level knowledge C/C++ and Python. Relevant knowledge of verification methodologies, Verilog simulation, waveform viewers, and emulation. Experience in silicon debug for logic, software, and physical issues Strong ability to triage issues and develop environment and tools. Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated. Ability to work well in a team and be productive under aggressive schedules.
Education & Experience
PhD, Masters Degree or Bachelors Degree with more than 5 years of experience in technical subject area. Seniority level
Seniority level
Mid-Senior level Employment type
Employment type
Full-time Job function
Job function
Quality Assurance Industries
Computer Hardware Manufacturing Referrals increase your chances of interviewing at Rivos Inc. by 2x Sign in to set job alerts for Validation Engineer roles.
Berthoud, CO $110,000.00-$145,000.00 3 weeks ago Silicon PCIe bringup and validation engineer
(USA) Manager II, Quality Engineer - Supply Chain
Loveland, CO $104,000.00-$156,000.00 19 hours ago Senior Quality Engineer - Liquids Propulsion
Berthoud, CO $104,000.00-$140,000.00 2 weeks ago Loveland, CO $114,700.00-$130,000.00 2 weeks ago Project/Associate Air Quality Engineer/Scientist
Fort Collins, CO $70,000.00-$80,000.00 1 week ago Silicon DDR Bringup and Validation Engineer
Fort Collins, CO $80,000.00-$85,000.00 1 week ago Alaska Senior Air Quality Engineer or Scientist
Fort Collins, CO $100,000.00-$120,000.00 1 week ago GPGPU SW and HW design validation engineer
Silicon Logic Formal Verification - Full Time
Berthoud, CO $130,000.00-$160,000.00 3 weeks ago Accelerator Design Verification - Full Time
Fort Collins, CO $107,000.00-$190,000.00 1 week ago Fort Collins, CO $141,300.00-$226,000.00 6 days ago Security Infrastructure Engineer - Full Time
Fort Collins, CO $90,000.00-$110,000.00 3 weeks ago Confidential Compute Systems Engineer - Full Time
Greater Fort Collins Area $156,000.00-$296,000.00 4 weeks ago Fort Collins, CO $17.00-$18.00 5 months ago Were unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI. #J-18808-Ljbffr
Silicon bringup and validation engineer
role at
Rivos Inc. Join to apply for the
Silicon bringup and validation engineer
role at
Rivos Inc. The Silicon Bringup and Validation Engineer is responsible for bringing up and validating the SOC subsystems in Rivos SOC design. This role requires a deep understanding of state-of-art SOC design in various aspects from physical design, logic, performance, power, and software. We have positions open in key components of the design such as Power Management, DDR/HBM, PCIe, CPU, and data accelerator. The tasks include test generation, test infrastructure setup, bringup planning and execution, validation plan development and execution. At this time, we plan to staff the technical leads or senior technical staff positions.
Responsibilities
As a lead, you will lead an engineering team responsible for designing, implementing and executing a subsystem silicon bringup plans, including functional and performance tests, to validate the subsystem for the silicon product to meet the product requirements. Collaborate with cross-functional teams including design, architecture, firmware, and software to ensure successful subsystem integration and validation. Work with vendors and partners to ensure successful subsystem bringup and validation, including reviewing and providing feedback on vendor documentation, and coordinating with vendor support teams. Debug and root-cause issues found during subsystem bringup and validation, and work with cross-functional teams to implement corrective actions. Drive continuous improvement of subsystem bringup and validation processes and methodologies, including automation, tool development, and documentation. Maintain up-to-date knowledge of the subsystem technology and industry trends.
Requirements
In-depth knowledge of architecture, microarchitecture, and software interface of the subsystem. Experienced level knowledge C/C++ and Python. Relevant knowledge of verification methodologies, Verilog simulation, waveform viewers, and emulation. Experience in silicon debug for logic, software, and physical issues Strong ability to triage issues and develop environment and tools. Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated. Ability to work well in a team and be productive under aggressive schedules.
Education & Experience
PhD, Masters Degree or Bachelors Degree with more than 5 years of experience in technical subject area. Seniority level
Seniority level
Mid-Senior level Employment type
Employment type
Full-time Job function
Job function
Quality Assurance Industries
Computer Hardware Manufacturing Referrals increase your chances of interviewing at Rivos Inc. by 2x Sign in to set job alerts for Validation Engineer roles.
Berthoud, CO $110,000.00-$145,000.00 3 weeks ago Silicon PCIe bringup and validation engineer
(USA) Manager II, Quality Engineer - Supply Chain
Loveland, CO $104,000.00-$156,000.00 19 hours ago Senior Quality Engineer - Liquids Propulsion
Berthoud, CO $104,000.00-$140,000.00 2 weeks ago Loveland, CO $114,700.00-$130,000.00 2 weeks ago Project/Associate Air Quality Engineer/Scientist
Fort Collins, CO $70,000.00-$80,000.00 1 week ago Silicon DDR Bringup and Validation Engineer
Fort Collins, CO $80,000.00-$85,000.00 1 week ago Alaska Senior Air Quality Engineer or Scientist
Fort Collins, CO $100,000.00-$120,000.00 1 week ago GPGPU SW and HW design validation engineer
Silicon Logic Formal Verification - Full Time
Berthoud, CO $130,000.00-$160,000.00 3 weeks ago Accelerator Design Verification - Full Time
Fort Collins, CO $107,000.00-$190,000.00 1 week ago Fort Collins, CO $141,300.00-$226,000.00 6 days ago Security Infrastructure Engineer - Full Time
Fort Collins, CO $90,000.00-$110,000.00 3 weeks ago Confidential Compute Systems Engineer - Full Time
Greater Fort Collins Area $156,000.00-$296,000.00 4 weeks ago Fort Collins, CO $17.00-$18.00 5 months ago Were unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI. #J-18808-Ljbffr