Rivos Inc.
Silicon PCIe bringup and validation engineer
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Silicon PCIe bringup and validation engineer
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1 year ago Be among the first 25 applicants Join to apply for the
Silicon PCIe bringup and validation engineer
role at
Rivos Inc. The role of the Silicon PCIe Bringup and Validation Engineer involves the initiation and validation of the PCIe subsystems within Rivos SOC design. This position demands a comprehensive grasp of cutting-edge PCIe design tailored for server applications, covering aspects such as physical design, logic, performance, system, and software. Responsibilities includes test generation, configuring test infrastructure, planning and executing bringup processes, and developing and executing validation plans specifically for PCIe systems. Currently, the intention is to fill technical lead or senior technical staff positions for this role .
Responsibilities
As a lead, you will lead an engineering team responsible for designing, implementing and executing a PCIe subsystem silicon bringup plans, including functional and performance tests, to validate the subsystem for the silicon product to meet the product requirements. Collaborate with cross-functional teams including design, architecture, firmware, and software to ensure successful subsystem integration and validation. Work with vendors and partners to ensure successful subsystem bringup and validation, including reviewing and providing feedback on vendor documentation, and coordinating with vendor support teams. Debug and root-cause issues found during subsystem bringup and validation, and work with cross-functional teams to implement corrective actions. Drive continuous improvement of subsystem bringup and validation processes and methodologies, including automation, tool development, and documentation. Maintain up-to-date knowledge of the subsystem technology and industry trends.
Requirements
In-depth knowledge of system architecture, performance/power, and software of PCIe subsystem for server applications. Experienced level knowledge C/C++ and Python. Relevant knowledge of verification methodologies, Verilog simulation, waveform viewers, and emulation. Experience in silicon debug for logic, software, and physical issues Strong ability to triage issues and develop environment and tools. Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated. Ability to work well in a team and be productive under aggressive schedules.
Education & Experience
PhD, Master’s Degree or Bachelor’s Degree with more than 5 years of experience in PCIe technical subject area.
Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Quality Assurance Industries Computer Hardware Manufacturing Referrals increase your chances of interviewing at Rivos Inc. by 2x Get notified about new Validation Engineer jobs in
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Join to apply for the
Silicon PCIe bringup and validation engineer
role at
Rivos Inc. Continue with Google Continue with Google Silicon PCIe bringup and validation engineer
1 year ago Be among the first 25 applicants Join to apply for the
Silicon PCIe bringup and validation engineer
role at
Rivos Inc. The role of the Silicon PCIe Bringup and Validation Engineer involves the initiation and validation of the PCIe subsystems within Rivos SOC design. This position demands a comprehensive grasp of cutting-edge PCIe design tailored for server applications, covering aspects such as physical design, logic, performance, system, and software. Responsibilities includes test generation, configuring test infrastructure, planning and executing bringup processes, and developing and executing validation plans specifically for PCIe systems. Currently, the intention is to fill technical lead or senior technical staff positions for this role .
Responsibilities
As a lead, you will lead an engineering team responsible for designing, implementing and executing a PCIe subsystem silicon bringup plans, including functional and performance tests, to validate the subsystem for the silicon product to meet the product requirements. Collaborate with cross-functional teams including design, architecture, firmware, and software to ensure successful subsystem integration and validation. Work with vendors and partners to ensure successful subsystem bringup and validation, including reviewing and providing feedback on vendor documentation, and coordinating with vendor support teams. Debug and root-cause issues found during subsystem bringup and validation, and work with cross-functional teams to implement corrective actions. Drive continuous improvement of subsystem bringup and validation processes and methodologies, including automation, tool development, and documentation. Maintain up-to-date knowledge of the subsystem technology and industry trends.
Requirements
In-depth knowledge of system architecture, performance/power, and software of PCIe subsystem for server applications. Experienced level knowledge C/C++ and Python. Relevant knowledge of verification methodologies, Verilog simulation, waveform viewers, and emulation. Experience in silicon debug for logic, software, and physical issues Strong ability to triage issues and develop environment and tools. Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated. Ability to work well in a team and be productive under aggressive schedules.
Education & Experience
PhD, Master’s Degree or Bachelor’s Degree with more than 5 years of experience in PCIe technical subject area.
Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Quality Assurance Industries Computer Hardware Manufacturing Referrals increase your chances of interviewing at Rivos Inc. by 2x Get notified about new Validation Engineer jobs in
Greater Fort Collins Area . Berthoud, CO $110,000 - $145,000 2 weeks ago Project/Associate Air Quality Engineer/Scientist
Fort Collins, CO $70,000 - $80,000 5 days ago Senior Quality Engineer - Liquids Propulsion
Berthoud, CO $104,000 - $140,000 2 weeks ago Loveland, CO $114,700 - $130,000 2 weeks ago Fort Collins, CO $80,000 - $85,000 2 days ago Silicon DDR Bringup and Validation Engineer
Fort Collins, CO $119,000.00 - $179,400.00 5 days ago Alaska Senior Air Quality Engineer or Scientist
Fort Collins, CO $100,000.00 - $120,000.00 5 days ago GPGPU SW and HW design validation engineer
Play/Tee Manager - Marianna Butte-Seasonal
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Berthoud, CO $130,000.00 - $160,000.00 2 weeks ago Accelerator Design Verification - Full Time
Fort Collins, CO $107,000 - $190,000 1 week ago Fort Collins, CO $141,300 - $226,000 1 day ago Security Infrastructure Engineer - Full Time
Fort Collins, CO $90,000 - $110,000 2 weeks ago Confidential Compute Systems Engineer - Full Time
Fort Collins, CO $107,000 - $190,000 1 week ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr