femtoAI
4 days ago Be among the first 25 applicants
Location:
Preferably SF Bay Area or Remote
As the
Design Verification Lead Engineer , you’ll play a pivotal role in delivering functionally correct products in our family of novel AI accelerators.
In this role, you will: Define, implement, and maintain a reusable testbench environment supporting UVM-based chip verification for femtoAI edge AI accelerator products
Develop and execute comprehensive test plans to ensure that products match the design specifications in first silicon
Analyze code and functional coverage results and work with the design team to identify improvements
Work with the firmware team to share configuration learning between pre-silicon testing and production firmware code
Lead the chip bring-up effort at first silicon leveraging the pre-silicon testing
This role offers an exciting opportunity to play a key role in delivering a cutting-edge AI edge product to market.
Requirements
Strong experience in System Verilog, UVM, and Python development
Prior experience developing a coverage-driven verification environment
7+ years of experience executing coverage-driven product verification, including power domain features
Solid understanding of processor architecture and common IO protocols
Must be a clear communicator
BS, MS, or PhD in Computer Science, Electrical Engineering, or a related field — or equivalent work experience
Benefits
Be part of a tight-knit team with a shared vision for pushing the boundaries of efficiency through AI Make a tangible impact across a broad range of industries and applications Featured benefits 401(k) Medical insurance Vision insurance Dental insurance Commuter benefits Disability insurance Paid maternity leave Paid paternity leave Child care support
FemtoAI is an equal opportunity employer committed to a diverse workforce which strives to create an inclusive working environment empowering everyone to do their best work. We do not discriminate on the basis of race, ethnicity, religion, gender, gender identity, sexual orientation, age, marital status, veteran status, or disability status.
Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at femtoAI by 2x Sign in to set job alerts for “Design Verification Engineer” roles.
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#J-18808-Ljbffr
Preferably SF Bay Area or Remote
As the
Design Verification Lead Engineer , you’ll play a pivotal role in delivering functionally correct products in our family of novel AI accelerators.
In this role, you will: Define, implement, and maintain a reusable testbench environment supporting UVM-based chip verification for femtoAI edge AI accelerator products
Develop and execute comprehensive test plans to ensure that products match the design specifications in first silicon
Analyze code and functional coverage results and work with the design team to identify improvements
Work with the firmware team to share configuration learning between pre-silicon testing and production firmware code
Lead the chip bring-up effort at first silicon leveraging the pre-silicon testing
This role offers an exciting opportunity to play a key role in delivering a cutting-edge AI edge product to market.
Requirements
Strong experience in System Verilog, UVM, and Python development
Prior experience developing a coverage-driven verification environment
7+ years of experience executing coverage-driven product verification, including power domain features
Solid understanding of processor architecture and common IO protocols
Must be a clear communicator
BS, MS, or PhD in Computer Science, Electrical Engineering, or a related field — or equivalent work experience
Benefits
Be part of a tight-knit team with a shared vision for pushing the boundaries of efficiency through AI Make a tangible impact across a broad range of industries and applications Featured benefits 401(k) Medical insurance Vision insurance Dental insurance Commuter benefits Disability insurance Paid maternity leave Paid paternity leave Child care support
FemtoAI is an equal opportunity employer committed to a diverse workforce which strives to create an inclusive working environment empowering everyone to do their best work. We do not discriminate on the basis of race, ethnicity, religion, gender, gender identity, sexual orientation, age, marital status, veteran status, or disability status.
Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at femtoAI by 2x Sign in to set job alerts for “Design Verification Engineer” roles.
Physical Design and Verification Engineer
Mountain View, CA $107,900.00-$242,000.00 3 weeks ago ASIC Design Verification Engineer, Devices and Services
Mountain View, CA $156,000.00-$229,000.00 6 days ago Mountain View, CA $107,900.00-$242,000.00 2 weeks ago Mountain View, CA $160,000.00-$170,000.00 2 weeks ago Palo Alto, CA $170,000.00-$200,000.00 2 weeks ago Mountain View, CA $156,000.00-$229,000.00 2 weeks ago Mountain View, CA $101,000.00-$152,000.00 2 weeks ago Mountain View, CA $125,000.00-$222,000.00 2 weeks ago Mountain View, CA $165,000.00-$190,000.00 2 months ago Mountain View, CA $120,000.00-$400,000.00 10 months ago San Francisco, CA $125,000.00-$164,000.00 1 month ago Silicon Validation Engineer, Reality Labs
San Francisco, CA $125,000.00-$164,000.00 1 month ago Mountain View, CA $140,000.00-$220,000.00 2 weeks ago Validation Engineer, ADAS Viewing & Parking Features
Physical Design and Verification Engineer
Fremont, CA $158,000.00-$243,000.00 8 months ago Systems Engineer, Platform Requirements and Verification
San Francisco, CA $140,000.00-$190,000.00 2 weeks ago Engineer, Chassis Electronics Validation
Palo Alto, CA $149,700.00-$198,320.00 2 weeks ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr