Mirafra Technologies
Sr Design Verification Engineers GPU
Mirafra Technologies, San Jose, California, United States, 95123
4 days ago Be among the first 25 applicants
Scroll down for a complete overview of what this job will require Are you the right candidate for this opportunity Get AI-powered advice on this job and more exclusive features. As a GPU Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities • Triage regression failures and make testbench updates • Debug functional errors in RTL model using simulation and debug tools. • Maintain efficient and clean regression status • Develop Scalable SystemVerilog/UVM testbenches for unit level and/or Cluster level verification. • Review Architecture and Micro-Architecture specifications. • Closely work with Architects and RTL designers. • Define, maintain and execute unit level and/or Cluster level verification testplans. • Generate and run Testcases on logic simulation models. • Code Functional coverage models and System Verilog assertions. • Drive Functional Coverage and Code coverage to closure. • Integrate C++ reference model into Scoreboards Requirements • 5-15 year’s industry experience in a design verification role. • Proficient in System Verilog/UVM/OVM, OOP/C++ • Knowledge of GPU, experience with Shader, Texture, or Memory System a plus • Experience with code coverage and functional coverage driven verification methodology. • Experience in creating, running and debugging of SystemVerilog/UVM constraint-random Testbench. • Excellent working knowledge of scripting languages such as Python or Perl. • Understanding of micro-architecture, logic design, FSMs, arithmetic datapath pipelines. • Strong functional verification experience including Test planning, Testbench Architecture, Test/Coverage Model/Assertion Development. • Strong debugging skills • Strong programming skills with good understanding of algorithms and data structures • Good verbal and written communication skills. Seniority level
Seniority levelMid-Senior level Employment type
Employment typeFull-time Job function
Job functionEngineering, Information Technology, and Design IndustriesSemiconductor Manufacturing, IT System Design Services, and Design Services Referrals increase your chances of interviewing at Mirafra Technologies by 2x Inferred from the description for this job Medical insurance Get notified when a new job is posted. Sign in to set job alerts for “Design Verification Engineer” roles. Sunnyvale, CA $114,000.00-$166,000.00 3 days ago San Jose, CA $136,000.00-$204,000.00 1 week ago Sunnyvale, CA $114,000.00-$166,000.00 22 hours ago Design Verification Engineer at Santa Clara, CA (Onsite) Santa Clara, CA $108,000.00-$212,750.00 3 days ago Mountain View, CA $107,900.00-$242,000.00 3 weeks ago Physical Design and Verification Engineer Sunnyvale, CA $142,000.00-$203,000.00 2 days ago San Jose, CA $140,000.00-$160,000.00 1 month ago Sunnyvale, CA $173,000.00-$249,000.00 4 days ago Mountain View, CA $107,900.00-$242,000.00 2 weeks ago Santa Clara, CA $161,250.00-$260,000.00 6 months ago ASIC Design Verification Engineer, Devices and Services Mountain View, CA $156,000.00-$229,000.00 6 days ago San Jose, CA $150,000.00-$275,000.00 2 weeks ago Advanced Physical Design and Verification Engineer (7036) San Jose, CA $85,500.00-$134,000.00 1 week ago San Jose, CA $130,000.00-$192,000.00 1 week ago San Jose, CA $129,400.00-$177,900.00 1 week ago Santa Clara, CA $137,450.00-$203,800.00 1 month ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
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Scroll down for a complete overview of what this job will require Are you the right candidate for this opportunity Get AI-powered advice on this job and more exclusive features. As a GPU Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities • Triage regression failures and make testbench updates • Debug functional errors in RTL model using simulation and debug tools. • Maintain efficient and clean regression status • Develop Scalable SystemVerilog/UVM testbenches for unit level and/or Cluster level verification. • Review Architecture and Micro-Architecture specifications. • Closely work with Architects and RTL designers. • Define, maintain and execute unit level and/or Cluster level verification testplans. • Generate and run Testcases on logic simulation models. • Code Functional coverage models and System Verilog assertions. • Drive Functional Coverage and Code coverage to closure. • Integrate C++ reference model into Scoreboards Requirements • 5-15 year’s industry experience in a design verification role. • Proficient in System Verilog/UVM/OVM, OOP/C++ • Knowledge of GPU, experience with Shader, Texture, or Memory System a plus • Experience with code coverage and functional coverage driven verification methodology. • Experience in creating, running and debugging of SystemVerilog/UVM constraint-random Testbench. • Excellent working knowledge of scripting languages such as Python or Perl. • Understanding of micro-architecture, logic design, FSMs, arithmetic datapath pipelines. • Strong functional verification experience including Test planning, Testbench Architecture, Test/Coverage Model/Assertion Development. • Strong debugging skills • Strong programming skills with good understanding of algorithms and data structures • Good verbal and written communication skills. Seniority level
Seniority levelMid-Senior level Employment type
Employment typeFull-time Job function
Job functionEngineering, Information Technology, and Design IndustriesSemiconductor Manufacturing, IT System Design Services, and Design Services Referrals increase your chances of interviewing at Mirafra Technologies by 2x Inferred from the description for this job Medical insurance Get notified when a new job is posted. Sign in to set job alerts for “Design Verification Engineer” roles. Sunnyvale, CA $114,000.00-$166,000.00 3 days ago San Jose, CA $136,000.00-$204,000.00 1 week ago Sunnyvale, CA $114,000.00-$166,000.00 22 hours ago Design Verification Engineer at Santa Clara, CA (Onsite) Santa Clara, CA $108,000.00-$212,750.00 3 days ago Mountain View, CA $107,900.00-$242,000.00 3 weeks ago Physical Design and Verification Engineer Sunnyvale, CA $142,000.00-$203,000.00 2 days ago San Jose, CA $140,000.00-$160,000.00 1 month ago Sunnyvale, CA $173,000.00-$249,000.00 4 days ago Mountain View, CA $107,900.00-$242,000.00 2 weeks ago Santa Clara, CA $161,250.00-$260,000.00 6 months ago ASIC Design Verification Engineer, Devices and Services Mountain View, CA $156,000.00-$229,000.00 6 days ago San Jose, CA $150,000.00-$275,000.00 2 weeks ago Advanced Physical Design and Verification Engineer (7036) San Jose, CA $85,500.00-$134,000.00 1 week ago San Jose, CA $130,000.00-$192,000.00 1 week ago San Jose, CA $129,400.00-$177,900.00 1 week ago Santa Clara, CA $137,450.00-$203,800.00 1 month ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
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