Mirafra Technologies
Direct message the job poster from Mirafra Technologies
Responsibilities
Strong Logic Design, RTL coding (Verilog HDL) and debugging skills Analyze and resolve Lint, CDC and RDC issues in the design Understanding of low power design and validation techniques including UPF Experience with constraint generation, timing closure analysis, formal verification, low power checks using UPF flows and ECO implementation. Experience with writing assertions and doing negative checks to validate assertions Experience with Silicon validation/Bring-up Qualifications
Experience with the following are highly desired: ARM CPUs Memory controllers Peripherals such as I2C, SPI, UART, LVDS, QSPI and SPMI Peripherals and interconnect protocols such as APB, AHB and AXI Seniority level
Mid-Senior level Employment type
Full-time Job function
Engineering and Information Technology Industries
Software Development
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Strong Logic Design, RTL coding (Verilog HDL) and debugging skills Analyze and resolve Lint, CDC and RDC issues in the design Understanding of low power design and validation techniques including UPF Experience with constraint generation, timing closure analysis, formal verification, low power checks using UPF flows and ECO implementation. Experience with writing assertions and doing negative checks to validate assertions Experience with Silicon validation/Bring-up Qualifications
Experience with the following are highly desired: ARM CPUs Memory controllers Peripherals such as I2C, SPI, UART, LVDS, QSPI and SPMI Peripherals and interconnect protocols such as APB, AHB and AXI Seniority level
Mid-Senior level Employment type
Full-time Job function
Engineering and Information Technology Industries
Software Development
#J-18808-Ljbffr