Lead E/E & Semiconductor Engineer - SOC Design Verification Engineer

Overview

Join to apply for the Lead E/E & Semiconductor Engineer - SOC Design Verification Engineer role at Capgemini Engineering .

We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal candidate will be responsible for defining and implementing SoC verification plans, building verification test benches for sub-system/SoC-level verification, and developing functional tests based on the verification plan.

Responsibilities

• Drive design verification to closure based on defined verification metrics, including test plan execution, functional coverage, and code coverage.
• Debug, root-cause, and resolve functional failures in collaboration with the design team.
• Work closely with cross-functional teams such as Design, Modeling, Emulation, and Silicon Validation to ensure the highest design quality.
• Lead and contribute to continuous improvements in design verification using the latest industry methodologies, tools, and technologies.

Qualifications

• Proven track record of first-pass success in ASIC development cycles.
• Bachelor’s degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.
• Strong experience with ARM processor-based SoCs and AMBA protocols (AHB, AXI).
• 8 to 10 years of hands-on experience with SystemVerilog and UVM methodology.
• Proficiency in one or more of the following areas in addition to functional verification:
• SystemVerilog Assertions (SVA)
• Formal Verification
• Emulation
• Experience with EDA tools and scripting languages such as Python, TCL, Perl, and Shell for building tools and verification flows.

Preferred Qualifications

• Experience verifying GPU/CPU designs and developing UVM-based verification environments from scratch.
• Background in design verification for data center applications, including Video, AI/ML, and Networking.
• Familiarity with version control systems such as Mercurial (Hg), Git, or SVN.
• Experience with IP or integration verification of high-speed interfaces such as PCIe, DDR, and Ethernet.

Life at Capgemini

Capgemini supports all aspects of your well-being throughout the changing stages of your life and career. For eligible employees, we offer:

• Flexible work
• Healthcare including dental, vision, mental health, and well-being programs
• Financial well-being programs such as 401(k) and Employee Share Ownership Plan
• Paid time off and paid holidays
• Paid parental leave
• Family building benefits like adoption assistance, surrogacy, and cryopreservation
• Social well-being benefits like subsidized back-up child/elder care and tutoring
• Mentoring, coaching and learning programs
• Employee Resource Groups
• Disaster Relief

About Capgemini Engineering

World leader in engineering and R&D services, Capgemini Engineering combines its broad industry knowledge and cutting-edge technologies in digital and software to support the convergence of the physical and digital worlds. Capgemini Engineering has more than 55,000 engineers and scientists in over 30 countries across sectors including Semiconductor & Electronics. Capgemini Engineering is part of Capgemini Group, a global leader in partnering with companies to transform and manage their business by harnessing technology. The Group is guided by its purpose of unleashing human energy through technology for an inclusive and sustainable future. The Group comprises 340,000 team members in more than 50 countries with 2023 global revenues of €22.5 billion.
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Disclaimer

Capgemini is an Equal Opportunity Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.

This is a general description of the duties, responsibilities and qualifications required for this position. Capgemini will consider reasonable accommodations during the recruitment process as needed.

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Applicants for employment in the US must have valid work authorization. Capgemini discloses salary range information in compliance with pay transparency obligations. The base salary range for the tagged location is $105,600 - $197,175 per year. This role may be eligible for additional compensation including variable pay, bonuses, or commissions.