Apple
Overview
DDR Design Engineer – San Diego, California, United States Hardware Summary Posted: Dec 05, 2024 Role Number: 200581922-3543 At Apple, we work every day to craft products that enrich people’s lives. We seek a visionary DRR/DDR design engineer with the ability to tackle challenges that have not been solved yet and to contribute to game-changing hardware design. Description
In this role, you will be part of the DDR PHY design team, providing best-in-class PHY designs for high-performance, low-power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study and architecture definition to design, verification, silicon bring-up and characterization. Responsibilities
Perform concept studies and provide direction on performance, gate count and power for various digital designs. Write detailed design specifications and test plans in collaboration with architecture, circuit designers and verification engineers. Provide high-quality RTL descriptions, including assertions, for the design. Use formal tools and static checkers to guarantee RTL quality. Support design verification to ensure bug-free first silicon. Drive functional and code coverage as well as timing closure for designs. Support silicon bring-up, performance and power characterization. Minimum Qualifications
BS degree in a technical discipline with minimum 10 years of relevant experience. Preferred Qualifications
RTL design using Verilog or SystemVerilog, assertion writing Design of state machines, data paths, arbitration and clock domain crossing logic Logic synthesis, timing constraints Exposure to Design For Test, understanding of scan concept and writing DFT-friendly RTL Unified Power Format for simulation, synthesis and electrical rule checking; equivalence checking Prior experience in DDR PHY design and mixed-signal environment is a plus Pay & Benefits
At Apple, base pay is one part of the total compensation package and is determined within a range. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience and location. Apple employees may participate in discretionary employee stock programs, stock purchase plans, and receive benefits including comprehensive medical and dental coverage, retirement benefits, discounted products and services, and reimbursement for certain educational expenses. The role may be eligible for discretionary bonuses or relocation. Learn more about Apple Benefits. Note: benefits and programs are subject to eligibility requirements and other terms. EEO and Other Notices
Apple is an equal opportunity employer committed to inclusion and diversity and does not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. E-Verify participation may apply in certain locations. Reasonable accommodations and a drug-free workplace policy are available. Apple will consider qualified applicants with criminal histories in accordance with applicable law. For San Francisco, review local guidelines. This description does not imply a contract of employment and may be modified at any time.
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DDR Design Engineer – San Diego, California, United States Hardware Summary Posted: Dec 05, 2024 Role Number: 200581922-3543 At Apple, we work every day to craft products that enrich people’s lives. We seek a visionary DRR/DDR design engineer with the ability to tackle challenges that have not been solved yet and to contribute to game-changing hardware design. Description
In this role, you will be part of the DDR PHY design team, providing best-in-class PHY designs for high-performance, low-power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study and architecture definition to design, verification, silicon bring-up and characterization. Responsibilities
Perform concept studies and provide direction on performance, gate count and power for various digital designs. Write detailed design specifications and test plans in collaboration with architecture, circuit designers and verification engineers. Provide high-quality RTL descriptions, including assertions, for the design. Use formal tools and static checkers to guarantee RTL quality. Support design verification to ensure bug-free first silicon. Drive functional and code coverage as well as timing closure for designs. Support silicon bring-up, performance and power characterization. Minimum Qualifications
BS degree in a technical discipline with minimum 10 years of relevant experience. Preferred Qualifications
RTL design using Verilog or SystemVerilog, assertion writing Design of state machines, data paths, arbitration and clock domain crossing logic Logic synthesis, timing constraints Exposure to Design For Test, understanding of scan concept and writing DFT-friendly RTL Unified Power Format for simulation, synthesis and electrical rule checking; equivalence checking Prior experience in DDR PHY design and mixed-signal environment is a plus Pay & Benefits
At Apple, base pay is one part of the total compensation package and is determined within a range. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience and location. Apple employees may participate in discretionary employee stock programs, stock purchase plans, and receive benefits including comprehensive medical and dental coverage, retirement benefits, discounted products and services, and reimbursement for certain educational expenses. The role may be eligible for discretionary bonuses or relocation. Learn more about Apple Benefits. Note: benefits and programs are subject to eligibility requirements and other terms. EEO and Other Notices
Apple is an equal opportunity employer committed to inclusion and diversity and does not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. E-Verify participation may apply in certain locations. Reasonable accommodations and a drug-free workplace policy are available. Apple will consider qualified applicants with criminal histories in accordance with applicable law. For San Francisco, review local guidelines. This description does not imply a contract of employment and may be modified at any time.
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