WayUp
Boeing, ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associat
WayUp, Huntington Beach, California, us, 92615
Overview
Join Boeing as an ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate or Mid-Level) on the Boeing Electronic Products team. Roles are located in Huntington Beach or El Segundo, CA. The team develops ASICs and FPGAs for Boeing’s products and collaborates across the company to support various programs. Responsibilities
Develop FPGA/ASIC designs supporting design and/or verification teams Implement FPGA/ASIC with current design practices and tools from block-level micro-architecture, through HDL coding, to physical design realization (through gate-level netlists for ASIC designs) Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed Perform static timing analysis, LEC, CDC, linting, and other checks to ensure design completion on schedule Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to create drivers, monitors, predictors, and scoreboards Support FPGA-based prototyping and validation depending on program and system requirements Validate design through hardware integration test with test equipment, test-beds, and higher-level systems as needed Basic Qualifications (Required)
Bachelor of Science degree in engineering, engineering technology, chemistry, physics, mathematics, data science, or computer science Experience with ASIC/FPGA design or verification Experience with ASIC/FPGA architectural definition, and detailed design implementation and functional verification using SystemVerilog Experience with hardware-based integration and test of ASIC/FPGA designs Preferred Qualifications
1+ years of related work experience or an equivalent combination of education and experience 3+ years of related work experience or an equivalent combination of education and experience Master’s Degree in EE, Computer Engineering/Science, or related field, or equivalent experience Experience with hardware emulators (e.g., Palladium) Proficiency with hardware verification languages: SystemVerilog, SystemVerilog Assertions Ability to executable test plans Proficiency with Object Oriented Programming concepts: Inheritance, Polymorphism Ability to create self-checking and reusable testbenches from scratch Experience developing Functional Coverage Models and closing Code Coverage Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet) Proficient in scripting languages: Make, Perl, Python Revision Control Systems: svn, cvs, git Proficient in Linux environments Familiarity with space-based design techniques and radiation mitigation Demonstrated history of first-pass success with ASIC designs Typical Education/Experience
Entry Level: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g., Bachelor) or an equivalent combination of technical education and experience. ABET accreditation is preferred but not required. Associate: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g., Bachelor) and typically 2 or more years of related work experience or an equivalent combination of technical education and experience (e.g., Master). ABET accreditation is preferred but not required. Mid-Level: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g., Bachelor) and typically 5 or more years of related work experience or an equivalent combination of technical education and experience (e.g., PhD, Master+3 years). ABET accreditation is preferred but not required. Additional Information
Relocation: This position offers relocation based on candidate eligibility. Drug Free Workplace: Boeing is a Drug Free Workplace where post-offer applicants and employees are subject to testing as outlined in policies. Shift: This position is for 1st shift. Employee Referral: Referral to this job is eligible for a bonus. EEO and Accommodation: Boeing is an Equal Opportunity Employer. See EEO notices and privacy statements for details. Salary ranges and basic eligibility: Summary pay ranges are provided for Entry Level, Associate, and Mid-Level. The exact offer is based on candidate experience, qualifications, and market conditions. Export Control: This position requires compliance with export control regulations; a U.S. Person status may be required. Visa Sponsorship: Boeing will not sponsor applicants for employment visa status. For more information about recruitment fraud, please review the recruitment fraud warning. Location: Huntington Beach, CA or El Segundo, CA
#J-18808-Ljbffr
Join Boeing as an ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate or Mid-Level) on the Boeing Electronic Products team. Roles are located in Huntington Beach or El Segundo, CA. The team develops ASICs and FPGAs for Boeing’s products and collaborates across the company to support various programs. Responsibilities
Develop FPGA/ASIC designs supporting design and/or verification teams Implement FPGA/ASIC with current design practices and tools from block-level micro-architecture, through HDL coding, to physical design realization (through gate-level netlists for ASIC designs) Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed Perform static timing analysis, LEC, CDC, linting, and other checks to ensure design completion on schedule Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to create drivers, monitors, predictors, and scoreboards Support FPGA-based prototyping and validation depending on program and system requirements Validate design through hardware integration test with test equipment, test-beds, and higher-level systems as needed Basic Qualifications (Required)
Bachelor of Science degree in engineering, engineering technology, chemistry, physics, mathematics, data science, or computer science Experience with ASIC/FPGA design or verification Experience with ASIC/FPGA architectural definition, and detailed design implementation and functional verification using SystemVerilog Experience with hardware-based integration and test of ASIC/FPGA designs Preferred Qualifications
1+ years of related work experience or an equivalent combination of education and experience 3+ years of related work experience or an equivalent combination of education and experience Master’s Degree in EE, Computer Engineering/Science, or related field, or equivalent experience Experience with hardware emulators (e.g., Palladium) Proficiency with hardware verification languages: SystemVerilog, SystemVerilog Assertions Ability to executable test plans Proficiency with Object Oriented Programming concepts: Inheritance, Polymorphism Ability to create self-checking and reusable testbenches from scratch Experience developing Functional Coverage Models and closing Code Coverage Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet) Proficient in scripting languages: Make, Perl, Python Revision Control Systems: svn, cvs, git Proficient in Linux environments Familiarity with space-based design techniques and radiation mitigation Demonstrated history of first-pass success with ASIC designs Typical Education/Experience
Entry Level: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g., Bachelor) or an equivalent combination of technical education and experience. ABET accreditation is preferred but not required. Associate: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g., Bachelor) and typically 2 or more years of related work experience or an equivalent combination of technical education and experience (e.g., Master). ABET accreditation is preferred but not required. Mid-Level: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g., Bachelor) and typically 5 or more years of related work experience or an equivalent combination of technical education and experience (e.g., PhD, Master+3 years). ABET accreditation is preferred but not required. Additional Information
Relocation: This position offers relocation based on candidate eligibility. Drug Free Workplace: Boeing is a Drug Free Workplace where post-offer applicants and employees are subject to testing as outlined in policies. Shift: This position is for 1st shift. Employee Referral: Referral to this job is eligible for a bonus. EEO and Accommodation: Boeing is an Equal Opportunity Employer. See EEO notices and privacy statements for details. Salary ranges and basic eligibility: Summary pay ranges are provided for Entry Level, Associate, and Mid-Level. The exact offer is based on candidate experience, qualifications, and market conditions. Export Control: This position requires compliance with export control regulations; a U.S. Person status may be required. Visa Sponsorship: Boeing will not sponsor applicants for employment visa status. For more information about recruitment fraud, please review the recruitment fraud warning. Location: Huntington Beach, CA or El Segundo, CA
#J-18808-Ljbffr