ScaleFlux
Application Specific Integrated Circuit Verification Engineer
ScaleFlux, San Jose, California, United States, 95199
Application Specific Integrated Circuit Verification Engineer
We are looking for ASIC verification engineers to join our rapidly growing engineering team focused on breakthrough cloud and data center infrastructure solutions involving both storage and computing. The ideal candidate for this role shares our passion for creating innovative technologies, and thrives in a highly dynamic, fast-paced, results-driven environment. We are looking for highly talented, passionate, and versatile engineers that can create next generation enterprise data center solutions. Location:
Milpitas, California Responsibilities
Work closely with the design team to review and understand specifications / architectures / micro-architectures Define test plans Develop block level and chip level verification environments Produce functional / code coverage metrics Run regression and debug / triage failures in simulation environment Validate features and work with software teams to debug issues in the lab Qualifications
BSEE, MSEE or above Proficiency in UVM methodology, Constrained Random, Coverage Driven Methodology, Verilog, System Verilog and test development for verification Good knowledges of Verilog simulator and waveform viewer Strong debug skills and experience with debug tools, such as Verdi Scripting languages Perl, Python Knowledge of C/C++ is a plus Seniority level
Mid-Senior level Employment type
Full-time Job function
Industries: Computer Hardware Manufacturing, Software Development, and Semiconductor Manufacturing
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We are looking for ASIC verification engineers to join our rapidly growing engineering team focused on breakthrough cloud and data center infrastructure solutions involving both storage and computing. The ideal candidate for this role shares our passion for creating innovative technologies, and thrives in a highly dynamic, fast-paced, results-driven environment. We are looking for highly talented, passionate, and versatile engineers that can create next generation enterprise data center solutions. Location:
Milpitas, California Responsibilities
Work closely with the design team to review and understand specifications / architectures / micro-architectures Define test plans Develop block level and chip level verification environments Produce functional / code coverage metrics Run regression and debug / triage failures in simulation environment Validate features and work with software teams to debug issues in the lab Qualifications
BSEE, MSEE or above Proficiency in UVM methodology, Constrained Random, Coverage Driven Methodology, Verilog, System Verilog and test development for verification Good knowledges of Verilog simulator and waveform viewer Strong debug skills and experience with debug tools, such as Verdi Scripting languages Perl, Python Knowledge of C/C++ is a plus Seniority level
Mid-Senior level Employment type
Full-time Job function
Industries: Computer Hardware Manufacturing, Software Development, and Semiconductor Manufacturing
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