Sandisk
Sr VLSI Design Engineer (Physical Design, New College Grad, Masters)
Sandisk, Milpitas, California, United States, 95035
Sr VLSI Design Engineer (Physical Design, New College Grad, Masters)
We are looking for highly motivated Electronic Design Engineers – Physical Design to join our Memory Technology Design team. This is an exciting opportunity for results‑oriented, entrepreneurial individuals to work with world‑class non‑volatile memory engineers on cutting‑edge NAND Flash memory design.
Responsibilities
Drive all aspects of physical design, including logic synthesis, place and route (P&R), and timing analysis for NAND Flash memory chips
Ensure designs meet performance, power, and area (PPA) targets
Collaborate closely with front‑end RTL teams and back‑end implementation engineers on physical verification, static timing analysis (STA), and tape‑out readiness
Apply deep knowledge of design principles and CAD tools to develop scalable physical design methodologies
Join the Memory Technology Design team and contribute to delivering high‑quality, innovative results in next‑generation NAND Flash memory.
Qualifications
Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with a graduation date of Dec 2024 – May/June 2025
Knowledge in synthesis, place & route, STA timing analysis and physical verification with EDA CAD tools
Preferred Skills
Familiarity with logic & physical design principles
Knowledge of scripting languages such as Unix shell, Perl, Python, and TCL
Understanding of device physics and experience in deep sub‑micron technologies; knowledge of Verilog and SystemVerilog
Strong problem‑solving, written and verbal communication, organization, and self‑motivation
Ability to work well in a team and meet aggressive schedules
Additional Information Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate based on race, color, ancestry, religion, sex, gender identity, age, national origin, sexual orientation, medical condition, marital status, disability, genetic information, military status, or other protected characteristics. We prohibit harassment and comply with applicable laws. For accommodations, please contact jobs.accommodations@sandisk.com with the job title and requisition number.
Compensation & Benefits Details
Pay position within the salary range is based on education, qualifications, certifications, experience, skills, performance, location, shift, internal/external equity, and business needs
Salary range shown may apply to certain locations and can be modified in the future
Eligibility to participate in Sandisk's Short‑Term Incentive (STI) Plan and, for some roles, Long‑Term Incentive (LTI) program including RSUs or cash equivalents
Comprehensive benefits including medical/dental/vision, life, disability, flexible spending accounts, employee assistance program, retirement plans, tuition reimbursement, and more
Note: Pay is not considered wages or compensation until earned, vested, and determinable; bonuses and benefits are at the company’s discretion
Seniority level: Mid‑Senior level
Employment type: Full‑time
Job function: Design
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Responsibilities
Drive all aspects of physical design, including logic synthesis, place and route (P&R), and timing analysis for NAND Flash memory chips
Ensure designs meet performance, power, and area (PPA) targets
Collaborate closely with front‑end RTL teams and back‑end implementation engineers on physical verification, static timing analysis (STA), and tape‑out readiness
Apply deep knowledge of design principles and CAD tools to develop scalable physical design methodologies
Join the Memory Technology Design team and contribute to delivering high‑quality, innovative results in next‑generation NAND Flash memory.
Qualifications
Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with a graduation date of Dec 2024 – May/June 2025
Knowledge in synthesis, place & route, STA timing analysis and physical verification with EDA CAD tools
Preferred Skills
Familiarity with logic & physical design principles
Knowledge of scripting languages such as Unix shell, Perl, Python, and TCL
Understanding of device physics and experience in deep sub‑micron technologies; knowledge of Verilog and SystemVerilog
Strong problem‑solving, written and verbal communication, organization, and self‑motivation
Ability to work well in a team and meet aggressive schedules
Additional Information Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate based on race, color, ancestry, religion, sex, gender identity, age, national origin, sexual orientation, medical condition, marital status, disability, genetic information, military status, or other protected characteristics. We prohibit harassment and comply with applicable laws. For accommodations, please contact jobs.accommodations@sandisk.com with the job title and requisition number.
Compensation & Benefits Details
Pay position within the salary range is based on education, qualifications, certifications, experience, skills, performance, location, shift, internal/external equity, and business needs
Salary range shown may apply to certain locations and can be modified in the future
Eligibility to participate in Sandisk's Short‑Term Incentive (STI) Plan and, for some roles, Long‑Term Incentive (LTI) program including RSUs or cash equivalents
Comprehensive benefits including medical/dental/vision, life, disability, flexible spending accounts, employee assistance program, retirement plans, tuition reimbursement, and more
Note: Pay is not considered wages or compensation until earned, vested, and determinable; bonuses and benefits are at the company’s discretion
Seniority level: Mid‑Senior level
Employment type: Full‑time
Job function: Design
#J-18808-Ljbffr