Northrop Grumman
Digital FPGA Engineer Level 4 (AHT) - R10206617
Northrop Grumman, Los Angeles, California, United States, 90079
Overview
Join to apply for the
Digital FPGA Engineer Level 4 (AHT) - R10206617
role at
Northrop Grumman . Relocation assistance may be available. Clearance type: Secret. Travel: No. The position is on-site in Northridge, CA on a 9/80 schedule. Telework is not available. The Digital FPGA Engineer will work on FPGA and ASIC design across the full product life cycle, supporting the ARRGM-ER program within the Advanced Weapons Business Unit in Northridge, CA. The role emphasizes research, design, and development for complex high-speed digital designs, and collaboration with Systems Engineering to ensure firmware design meets system-level requirements. Roles And Responsibilities
Research, design, and development for complex high-speed digital designs. Support the implementation of digital FPGA hardware architecture and algorithms. Collaborate with Systems Engineering to ensure firmware design meets system-level requirements; review designs and analyses. Basic Qualifications (Digital FPGA Engineer Level 4)
Bachelor’s degree in electrical engineering or other STEM discipline with 8 years of digital verification engineering experience using industry-standard simulation tools; 6 years with an MS degree; 4 years with a PhD. Hands-on FPGA design experience with VHDL and/or Verilog within the past 3 years. Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs. Experience with Electronic Design Automation (EDA) Tools: Vivado, Quartus, and QuestaSim. Must have an active DoD Secret Clearance to start. Preferred Qualifications (Digital FPGA Engineer Level 4)
Proficient in DSP algorithms and their implementation onto the FPGA using MATLAB and Simulink. Expertise in high-speed FPGA implementation such as AXI, DMA, PCIe, HSSI, DDR3, Ethernet. Strong design skills in VHDL and Verilog. Experience in FPGA physical constraints and achieving timing closure. Experience in developing low-level FPGA requirements and verification procedures. Background in RF design with experience debugging at board or system level using test equipment. Generation of complex test benches in ModelSim or QuestaSim to support formal verification. Familiarity with the VxWorks RTOS, its architecture and development tools. Salary and Benefits
Primary Level Salary Range: $151,000.00 - $226,700.00. The above salary range is a guideline; base salary offers depend on factors such as scope, responsibilities, experience, education, and market conditions. Overtime, shift differential, and discretionary bonuses may apply. Long-term incentives may be offered for certain roles. Northrop Grumman provides a variety of benefits including health insurance, life and disability insurance, a savings plan, company-paid holidays, and paid time off for vacation and/or personal business. The application period for the job is estimated to be 20 days from the posting date, though this timeline may be shortened or extended based on business needs. Equal Opportunity
Northrop Grumman is an Equal Opportunity Employer. Decisions are made without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.
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Join to apply for the
Digital FPGA Engineer Level 4 (AHT) - R10206617
role at
Northrop Grumman . Relocation assistance may be available. Clearance type: Secret. Travel: No. The position is on-site in Northridge, CA on a 9/80 schedule. Telework is not available. The Digital FPGA Engineer will work on FPGA and ASIC design across the full product life cycle, supporting the ARRGM-ER program within the Advanced Weapons Business Unit in Northridge, CA. The role emphasizes research, design, and development for complex high-speed digital designs, and collaboration with Systems Engineering to ensure firmware design meets system-level requirements. Roles And Responsibilities
Research, design, and development for complex high-speed digital designs. Support the implementation of digital FPGA hardware architecture and algorithms. Collaborate with Systems Engineering to ensure firmware design meets system-level requirements; review designs and analyses. Basic Qualifications (Digital FPGA Engineer Level 4)
Bachelor’s degree in electrical engineering or other STEM discipline with 8 years of digital verification engineering experience using industry-standard simulation tools; 6 years with an MS degree; 4 years with a PhD. Hands-on FPGA design experience with VHDL and/or Verilog within the past 3 years. Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs. Experience with Electronic Design Automation (EDA) Tools: Vivado, Quartus, and QuestaSim. Must have an active DoD Secret Clearance to start. Preferred Qualifications (Digital FPGA Engineer Level 4)
Proficient in DSP algorithms and their implementation onto the FPGA using MATLAB and Simulink. Expertise in high-speed FPGA implementation such as AXI, DMA, PCIe, HSSI, DDR3, Ethernet. Strong design skills in VHDL and Verilog. Experience in FPGA physical constraints and achieving timing closure. Experience in developing low-level FPGA requirements and verification procedures. Background in RF design with experience debugging at board or system level using test equipment. Generation of complex test benches in ModelSim or QuestaSim to support formal verification. Familiarity with the VxWorks RTOS, its architecture and development tools. Salary and Benefits
Primary Level Salary Range: $151,000.00 - $226,700.00. The above salary range is a guideline; base salary offers depend on factors such as scope, responsibilities, experience, education, and market conditions. Overtime, shift differential, and discretionary bonuses may apply. Long-term incentives may be offered for certain roles. Northrop Grumman provides a variety of benefits including health insurance, life and disability insurance, a savings plan, company-paid holidays, and paid time off for vacation and/or personal business. The application period for the job is estimated to be 20 days from the posting date, though this timeline may be shortened or extended based on business needs. Equal Opportunity
Northrop Grumman is an Equal Opportunity Employer. Decisions are made without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.
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