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Sunrise Systems, Inc.

IP Design Engineer

Sunrise Systems, Inc., Santa Clara, California, us, 95053

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Sr. Delivery Manager @ Sunrise Systems, Inc.

Santa Clara, CA (Position is 100% remote) Interview process is with MS Teams 6 months contract Job Duties:

Soft IP Development for AMD FPGA's using Verilog/Systemverilog. Integrate third party IP cores into an FPGA system, create custom RTL wrappers for third party cores, and interface with IP vendors Work with Verification Engineers to verify IP and debug issues. Participate in board bring up as well as system level integration. Experience and Education:

7 to 12 years of experience in digital design RTL coding experience using Verilog and/or System Verilog Working experience of AMD/Xilinx FPGA and Vivado Experience in Video domain (DisplayPort/MIPI/HDMI/SDI) is preferred Detailed understanding and proven track record of designing leading edge standard and proprietary high speed interfaces IPs/Solutions Good understanding of system design aspects and its impact on performance and throughput Base pay range: $50.00/hr - $53.00/hr Sunrise Systems, Inc. is an equal opportunities employer.

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