Qualcomm
Company:
Qualcomm Technologies, Inc. Job Area:
Engineering Group, Engineering Group > ASICS Engineering General Summary Candidate will be responsible for design/developing next generation power control systems. Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, RTL design along with interactions with verification, Synthesis & PD teams for design convergence. Skills/Experience Sr Engineer / Staff Engineer 5 to 8 years of strong experience in digital front end design for ASICs Expertise in RTL coding in Verilog/VHDL/SV of complex designs with multiple clock domains and multiple power domains Familiar with UPF and power domain crossing Familiarity with various bus protocols like AHB, AXI, SPMI, I2C, SPI Experience in low power design methodology and clock domain crossing designs Experience in Spyglass Lint/CDC checks and waiver creation Experience in formal verification with Cadence LEC Understanding of full RTL to GDS flow to interact with DFT and PD teams Expertise in Perl, TCL language Expertise in post-Si debug is a plus Good documentation skills Should possess good communication skills to ensure effective interaction with Engineering Management and team members. Should be self-motivated with good teamwork attitude and need to function with minimal guidance or supervision Responsibilities Digital design and development (RTL) working in close collaboration with Multi-site leads across US and India Developing the micro architecture and implementing the design using Verilog/SV. Integrate and deliver complex subsystem to SoC Design and implement defined tasks independently. Work in close coordination with Systems, Verification, SoC team , SW team, PD & DFT teams to get the goals completed. Analyze reports/waivers or run various tools : Spyglass, 0-in, DC-Compiler, Prime time, synthesis, simulation etc. Minimum Qualifications: Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. EEO Employer:
Qualcomm is an equal opportunity employer. Qualcomm is committed to providing an accessible process and reasonable accommodations for individuals with disabilities during the application/hiring process. For accommodations, please email disability-accomodations@qualcomm.com or call Qualcomm’s toll-free number found here. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Pay range and Other Compensation & Benefits:
$140,000.00 - $210,000.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation at Qualcomm, which also includes a competitive annual discretionary bonus program and potential RSU grants. Our benefits package supports employees at work, at home, and at play. Your recruiter can discuss details about Qualcomm benefits. If you would like more information about this role, please contact Qualcomm Careers.
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Qualcomm Technologies, Inc. Job Area:
Engineering Group, Engineering Group > ASICS Engineering General Summary Candidate will be responsible for design/developing next generation power control systems. Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, RTL design along with interactions with verification, Synthesis & PD teams for design convergence. Skills/Experience Sr Engineer / Staff Engineer 5 to 8 years of strong experience in digital front end design for ASICs Expertise in RTL coding in Verilog/VHDL/SV of complex designs with multiple clock domains and multiple power domains Familiar with UPF and power domain crossing Familiarity with various bus protocols like AHB, AXI, SPMI, I2C, SPI Experience in low power design methodology and clock domain crossing designs Experience in Spyglass Lint/CDC checks and waiver creation Experience in formal verification with Cadence LEC Understanding of full RTL to GDS flow to interact with DFT and PD teams Expertise in Perl, TCL language Expertise in post-Si debug is a plus Good documentation skills Should possess good communication skills to ensure effective interaction with Engineering Management and team members. Should be self-motivated with good teamwork attitude and need to function with minimal guidance or supervision Responsibilities Digital design and development (RTL) working in close collaboration with Multi-site leads across US and India Developing the micro architecture and implementing the design using Verilog/SV. Integrate and deliver complex subsystem to SoC Design and implement defined tasks independently. Work in close coordination with Systems, Verification, SoC team , SW team, PD & DFT teams to get the goals completed. Analyze reports/waivers or run various tools : Spyglass, 0-in, DC-Compiler, Prime time, synthesis, simulation etc. Minimum Qualifications: Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. EEO Employer:
Qualcomm is an equal opportunity employer. Qualcomm is committed to providing an accessible process and reasonable accommodations for individuals with disabilities during the application/hiring process. For accommodations, please email disability-accomodations@qualcomm.com or call Qualcomm’s toll-free number found here. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Pay range and Other Compensation & Benefits:
$140,000.00 - $210,000.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation at Qualcomm, which also includes a competitive annual discretionary bonus program and potential RSU grants. Our benefits package supports employees at work, at home, and at play. Your recruiter can discuss details about Qualcomm benefits. If you would like more information about this role, please contact Qualcomm Careers.
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