NVIDIA
Senior ASIC Verification Engineer, Coherent High Speed Interconnect
NVIDIA, Santa Clara, California, us, 95053
Overview
Senior ASIC Verification Engineer for Coherent High Speed Interconnect at NVIDIA. Verify the design and implementation of high speed coherent interconnects for mobile SoCs and GPUs. Work within a technology-focused company impacting product lines from consumer graphics to AI hardware.
What You’ll Be Doing
Verify high-speed coherent interconnect design, architecture and golden models.
Develop micro-architecture with sophisticated verification methodologies.
Define verification scope, develop testbenches, BFMs, checkers, monitors, complete test/coverage plans, and verify design correctness.
Collaborate with architects, designers, emulation and silicon verification teams to accomplish tasks.
What We Need To See
Bachelors or Master’s Degree (or equivalent experience).
3+ years of relevant verification experience.
Experience in architecting test bench environments for unit level verification.
Background in verification using random stimulus with functional coverage and assertion-based methodologies.
Prior design or verification experience of coherent high-speed interconnects.
Knowledge of industry standard interconnect protocols (PCIe, CXL, CHI) is useful.
Strong background developing test benches from scratch using SystemVerilog and UVM.
C++ programming, scripting ability and expertise in SystemVerilog.
Experience with design/verification tools (VCS or equivalent, debuggers).
Strong debugging and analytical skills.
Excellent communication and interpersonal skills; mentoring experience is a plus.
Salary, Benefits & Eligibility Hybrid role. Base salary ranges: 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4, determined by location and experience. Equity and benefits are included. Applications accepted at least until August 25, 2025.
Equal Opportunity NVIDIA is committed to fostering a diverse work environment and is an equal opportunity employer. We do not discriminate based on race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.
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What You’ll Be Doing
Verify high-speed coherent interconnect design, architecture and golden models.
Develop micro-architecture with sophisticated verification methodologies.
Define verification scope, develop testbenches, BFMs, checkers, monitors, complete test/coverage plans, and verify design correctness.
Collaborate with architects, designers, emulation and silicon verification teams to accomplish tasks.
What We Need To See
Bachelors or Master’s Degree (or equivalent experience).
3+ years of relevant verification experience.
Experience in architecting test bench environments for unit level verification.
Background in verification using random stimulus with functional coverage and assertion-based methodologies.
Prior design or verification experience of coherent high-speed interconnects.
Knowledge of industry standard interconnect protocols (PCIe, CXL, CHI) is useful.
Strong background developing test benches from scratch using SystemVerilog and UVM.
C++ programming, scripting ability and expertise in SystemVerilog.
Experience with design/verification tools (VCS or equivalent, debuggers).
Strong debugging and analytical skills.
Excellent communication and interpersonal skills; mentoring experience is a plus.
Salary, Benefits & Eligibility Hybrid role. Base salary ranges: 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4, determined by location and experience. Equity and benefits are included. Applications accepted at least until August 25, 2025.
Equal Opportunity NVIDIA is committed to fostering a diverse work environment and is an equal opportunity employer. We do not discriminate based on race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.
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