Qualcomm
Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer
Qualcomm, San Diego, California, United States, 92189
Overview
Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer at Qualcomm. Responsibilities
Architect, design (RTL coding), and deploy high-speed memory subsystems in Qualcomm technologies and products. Develop design specifications and drive the micro-architecture of portions of the logic design. Implement RTL and work with verification engineers to deliver high quality designs. Debug designs and provide debug support when integrated into the chip. Synthesis, timing closure, physical design support, gate-level simulations, and power analysis are expected tasks. Contribute to overall design methodology improvements to drive productivity and quality of results. Qualifications
Bachelor's or Master's degree in Science, Engineering, or related field. 5+ years ASIC design, RTL coding, front-end digital design experience. Preferred Qualifications
5-10 years of ASIC design (RTL coding). Experience with RTL Design Verification flows is a plus. Bachelors degree in Electrical or Computer Engineering; Master’s degree preferred. Experience with LPDDR memory and cache controller, NoC-based architectures, especially front end interfacing to CPU, DSP, and multimedia processors. On-chip tightly coupled SRAM & L3 cache controller architecture/design. Experience with x86 or ARM CPU/bus architectures. Ordering of memory transactions and ensuring proper ordering to conform to ISA architecture specifications. Education Requirements
Required: Bachelor’s, Computer Engineering and/or Electrical Engineering. Preferred: Master’s, Computer Engineering and/or Electrical Engineering. Minimum Qualifications
Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Or Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. Or PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm will provide reasonable accommodations upon request. For accommodations, contact disability-accommodations@qualcomm.com. Pay Range And Other Compensation & Benefits
$140,000 - $210,000. Qualcomm offers a competitive bonus program and potential RSU grants, along with a comprehensive benefits package.
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Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer at Qualcomm. Responsibilities
Architect, design (RTL coding), and deploy high-speed memory subsystems in Qualcomm technologies and products. Develop design specifications and drive the micro-architecture of portions of the logic design. Implement RTL and work with verification engineers to deliver high quality designs. Debug designs and provide debug support when integrated into the chip. Synthesis, timing closure, physical design support, gate-level simulations, and power analysis are expected tasks. Contribute to overall design methodology improvements to drive productivity and quality of results. Qualifications
Bachelor's or Master's degree in Science, Engineering, or related field. 5+ years ASIC design, RTL coding, front-end digital design experience. Preferred Qualifications
5-10 years of ASIC design (RTL coding). Experience with RTL Design Verification flows is a plus. Bachelors degree in Electrical or Computer Engineering; Master’s degree preferred. Experience with LPDDR memory and cache controller, NoC-based architectures, especially front end interfacing to CPU, DSP, and multimedia processors. On-chip tightly coupled SRAM & L3 cache controller architecture/design. Experience with x86 or ARM CPU/bus architectures. Ordering of memory transactions and ensuring proper ordering to conform to ISA architecture specifications. Education Requirements
Required: Bachelor’s, Computer Engineering and/or Electrical Engineering. Preferred: Master’s, Computer Engineering and/or Electrical Engineering. Minimum Qualifications
Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Or Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. Or PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm will provide reasonable accommodations upon request. For accommodations, contact disability-accommodations@qualcomm.com. Pay Range And Other Compensation & Benefits
$140,000 - $210,000. Qualcomm offers a competitive bonus program and potential RSU grants, along with a comprehensive benefits package.
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