Correct Designs
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Design Verification Engineer (remote position)
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Correct Designs
Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long-term stability and benefits? Correct Designs can offer all of these. Correct Designs is seeking talented Verification Engineers with SystemVerilog UVM experience to work with major clients in Austin, TX, and nationwide. Opportunities include projects in AI, Machine Learning, processor fabric subsystems, SOC/ASIC products for vision processing, aerospace FPGAs, medical electronics, RISC-V based SoC, ARM peripherals, and mixed signal DSPs. Successful candidates will support verification of advanced CPU/GPU based SOCs. We are not a typical contracting firm. Our engineers enjoy long-term roles with competitive hourly rates in excellent team environments. Contracts can last around 3 years, with options for shorter or longer durations. We are respected in the Verification community, with ongoing demand for CDI engineers. You can take breaks between contracts and return to work, or move seamlessly from one contract to the next. Correct Designs provides healthcare and retirement benefits. Based in Austin, Texas, we offer both in-person and remote work opportunities. Whether you're an experienced professional seeking new challenges or a talented engineer looking to broaden your experience, we have exciting options for your career. Responsibilities
Verify complex design blocks using advanced SV/UVM verification environments Develop and execute pre-silicon verification test plans Create directed and random verification tests to validate functionality Develop verification components and tools Implement verification functional coverage using industry-standard tools/methods Debug regression failures Replicate and review functional issues found externally or post-silicon, and enhance tests to verify bug fixes Required Skills and Experience
3+ years of proven verification experience in hardware development Strong background in SystemVerilog and UVM methodologies Proficiency with debug tools such as DVE/Verdi Object-oriented programming, computer architecture, and data structures knowledge Strong analytical and problem-solving skills with attention to detail Excellent interpersonal and communication skills Comfortable working across geographies Desired Skills
Experience architecting/developing verification environments and scripting (Perl, Ruby, Make, etc.) Knowledge of formal verification, RTL design, or software development Education
Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or Computer Science Seniority Level
Mid-Senior level Employment Type
Full-time Job Function
Engineering and Information Technology Industries
Semiconductors
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Design Verification Engineer (remote position)
role at
Correct Designs
Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long-term stability and benefits? Correct Designs can offer all of these. Correct Designs is seeking talented Verification Engineers with SystemVerilog UVM experience to work with major clients in Austin, TX, and nationwide. Opportunities include projects in AI, Machine Learning, processor fabric subsystems, SOC/ASIC products for vision processing, aerospace FPGAs, medical electronics, RISC-V based SoC, ARM peripherals, and mixed signal DSPs. Successful candidates will support verification of advanced CPU/GPU based SOCs. We are not a typical contracting firm. Our engineers enjoy long-term roles with competitive hourly rates in excellent team environments. Contracts can last around 3 years, with options for shorter or longer durations. We are respected in the Verification community, with ongoing demand for CDI engineers. You can take breaks between contracts and return to work, or move seamlessly from one contract to the next. Correct Designs provides healthcare and retirement benefits. Based in Austin, Texas, we offer both in-person and remote work opportunities. Whether you're an experienced professional seeking new challenges or a talented engineer looking to broaden your experience, we have exciting options for your career. Responsibilities
Verify complex design blocks using advanced SV/UVM verification environments Develop and execute pre-silicon verification test plans Create directed and random verification tests to validate functionality Develop verification components and tools Implement verification functional coverage using industry-standard tools/methods Debug regression failures Replicate and review functional issues found externally or post-silicon, and enhance tests to verify bug fixes Required Skills and Experience
3+ years of proven verification experience in hardware development Strong background in SystemVerilog and UVM methodologies Proficiency with debug tools such as DVE/Verdi Object-oriented programming, computer architecture, and data structures knowledge Strong analytical and problem-solving skills with attention to detail Excellent interpersonal and communication skills Comfortable working across geographies Desired Skills
Experience architecting/developing verification environments and scripting (Perl, Ruby, Make, etc.) Knowledge of formal verification, RTL design, or software development Education
Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or Computer Science Seniority Level
Mid-Senior level Employment Type
Full-time Job Function
Engineering and Information Technology Industries
Semiconductors
#J-18808-Ljbffr