Qualcomm
Staff/Sr. Staff RTL Design Engineer - QGOV
Qualcomm, San Diego, California, United States, 92189
Company: Qualcomm Technologies, Inc.
Job Area: Engineering Group, Engineering Group > ASICS Engineering
General Summary:
As a Design Engineer, you’ll play a critical role in shaping cutting-edge digital designs.
Responsibilities:
Micro-Architecture: Designing micro-architecture for both simple and complex digital, interface blocks.
RTL Development: Developing RTL code using industry best practices. This includes handling multi-clock designs, high-frequency requirements, low power, and low latency considerations while ensuring high performance.
Debugging and Post-Silicon Bring-Up: Troubleshooting and debugging issues during the development process and supporting post-silicon bring-up activities.
Documentation: Creating comprehensive design documentation to ensure clarity and maintainability.
Design Optimization: Optimizing designs for key metrics such as area, power, and performance.
Cross-Functional Collaboration: Collaborating with cross-functional teams, including DFT, Implementation, Verification, Emulation, and Firmware teams.
Must be in San Diego full time, 5 days a week
Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
Must be a U.S. citizen and eligible to receive a U.S. Government security clearance
Ideal candidate will have:
6-10+ years of work experience with RTL/FPGA design (Verilog, System Verilog), embedded system architecture and Verification
Bachelor's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR Master's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
Preferred Qualifications:
Positive Attitude: Bring a fun-loving attitude and a passion for inclusively solving problems.
Experience: 5+ years of ASIC design experience
RTL Expertise: System Verilog Design, Linting, CDC, Synthesis (FPGA and ASIC)
Testing: Building the test suites for design validation
Emulation: understanding of Emulation and prototyping flows for the design and validation in Lab is a big Plus.
Complex Digital Logic Design: Experience with designing complex digital logic blocks and sub systems (CPU, GPU, DSP, Always on Systems, Digital interfaces (PCIe, UART, I2c, DDRx, SPI, USB).
ISA Familiarity: Knowledge of ISAs (Instruction Set Architectures) such as ARM THUMB or RISC-V.
Processor/Microcontroller System Design: Understanding of processor or microcontroller system design.
Multi-Power Domain and Multi-Clock Domain Designs: Experience with designs spanning multiple power domains and clock domains.
Scripting/Automation Languages: Proficiency in scripting or automation languages like Python or Perl.
Industry Standard Digital Tools: Familiarity with state-of-the-art industry-standard digital design tools.
Challenges of Lower Node Technologies: Awareness of challenges faced when working with lower node technologies.
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
$164,000.00 - $246,000.00
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As a Design Engineer, you’ll play a critical role in shaping cutting-edge digital designs.
Responsibilities:
Micro-Architecture: Designing micro-architecture for both simple and complex digital, interface blocks.
RTL Development: Developing RTL code using industry best practices. This includes handling multi-clock designs, high-frequency requirements, low power, and low latency considerations while ensuring high performance.
Debugging and Post-Silicon Bring-Up: Troubleshooting and debugging issues during the development process and supporting post-silicon bring-up activities.
Documentation: Creating comprehensive design documentation to ensure clarity and maintainability.
Design Optimization: Optimizing designs for key metrics such as area, power, and performance.
Cross-Functional Collaboration: Collaborating with cross-functional teams, including DFT, Implementation, Verification, Emulation, and Firmware teams.
Must be in San Diego full time, 5 days a week
Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
Must be a U.S. citizen and eligible to receive a U.S. Government security clearance
Ideal candidate will have:
6-10+ years of work experience with RTL/FPGA design (Verilog, System Verilog), embedded system architecture and Verification
Bachelor's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR Master's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
Preferred Qualifications:
Positive Attitude: Bring a fun-loving attitude and a passion for inclusively solving problems.
Experience: 5+ years of ASIC design experience
RTL Expertise: System Verilog Design, Linting, CDC, Synthesis (FPGA and ASIC)
Testing: Building the test suites for design validation
Emulation: understanding of Emulation and prototyping flows for the design and validation in Lab is a big Plus.
Complex Digital Logic Design: Experience with designing complex digital logic blocks and sub systems (CPU, GPU, DSP, Always on Systems, Digital interfaces (PCIe, UART, I2c, DDRx, SPI, USB).
ISA Familiarity: Knowledge of ISAs (Instruction Set Architectures) such as ARM THUMB or RISC-V.
Processor/Microcontroller System Design: Understanding of processor or microcontroller system design.
Multi-Power Domain and Multi-Clock Domain Designs: Experience with designs spanning multiple power domains and clock domains.
Scripting/Automation Languages: Proficiency in scripting or automation languages like Python or Perl.
Industry Standard Digital Tools: Familiarity with state-of-the-art industry-standard digital design tools.
Challenges of Lower Node Technologies: Awareness of challenges faced when working with lower node technologies.
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
$164,000.00 - $246,000.00
#J-18808-Ljbffr