Logo
ZRG Careers

FPGA DSP Design Engineer

ZRG Careers, Fort Worth, Texas, United States, 76102

Save Job

Overview

Airspan Networks is a global provider of innovative 4G and 5G network solutions, enabling efficient and cost-effective connectivity for operators, enterprises, and industrial applications. We are seeking an experienced

FPGA Design Engineer

to contribute to the development of cutting-edge wireless communication systems. As an

FPGA Design Engineer , you will be responsible for designing, implementing, and optimizing FPGA-based solutions for wireless communication applications, including 4G, 5G, and O-RAN systems. You will work closely with system architects, software engineers, and verification engineers to develop high-performance digital hardware solutions. Key Responsibilities

Design and implement FPGA-based digital signal processing (DSP) and communication systems. Develop RTL designs

Verilog/SystemVerilog , ensuring efficient and high-performance implementations. Integrate and optimize FPGA-based modules for

wireless technologies, including 4G, 5G, and O-RAN architectures . Perform FPGA synthesis, timing analysis, and resource utilization optimization. Collaborate with verification engineers to define test benches and validate designs. Debug and troubleshoot FPGA-based systems using simulation tools and hardware debugging techniques. Work with

C/C++

and Python for algorithm modeling and hardware/software co-design. Implement high-speed interfaces such as

PCIe, Ethernet, and JESD204B . Document design specifications, test results, and technical reports. Qualifications & Experience

Critical Skills: O-RAN, DSP, Xilinx FPGA, RF-SOC Bachelor's or Master’s degree in

Electrical Engineering, Computer Engineering, or a related field . 10 years

of experience in

FPGA design and development . Proficiency in

Verilog/SystemVerilog

for digital logic design. Experience with FPGA development tools such as

Xilinx Vivado, Intel Quartus . Knowledge of

wireless communication systems, 4G/5G networks, and O-RAN architectures . Strong understanding of

DSP algorithms

and their FPGA implementations. Experience in debugging in the lab using Vivado ILAs and Experience using Signal Generators and analyzers Familiarity with

high-speed communication protocols

(PCIe, Ethernet, JESD204B, CPRI, etc.). Experience with

C/C++ and Python

for hardware modeling and testing. Strong problem-solving and analytical skills with a proactive approach to debugging complex systems. Preferred Skills

Experience with

FPGA-based acceleration for AI/ML applications . Understanding of

MATLAB/Simulink

for DSP algorithm verification. Knowledge of

power optimization techniques

for FPGA designs. Experience with

Linux device drivers and embedded systems . Seniority level

Mid-Senior level Employment type

Full-time Job function

Design and Engineering Industries: Telecommunications, Electrical Equipment Manufacturing, and Appliances, Electrical, and Electronics Manufacturing

#J-18808-Ljbffr