Intel Corporation
Job Details
Get AI-powered advice on this job and more exclusive features. Join Intel's Silicon Engineering Group (SiG)
As part of our elite engineering organization, you'll be at the forefront of semiconductor innovation, transforming cutting‑edge concepts into the silicon that drives everything from personal devices to massive data centers and emerging edge technologies. Mission
Architect the Future of Server Computing – your expertise directly impacts Intel's next‑generation server CPUs, the engines powering cloud infrastructure, AI workloads, and enterprise computing worldwide. Responsibilities
Conduct verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms. Create comprehensive formal verification test and coverage plans including definition of formal verification scope, strategy, and techniques. Develop abstraction models for convergence on the design, carve out the right boundaries for the design, and track, verify, and apply abstraction techniques. Develop formal proofs to implement the verification plan, review the completed proofs, and develop new formal verification methodologies. Perform convergence on design by creating formal verification methodology, abstraction, and simulation techniques. Find and implement corrective measures to resolve failing tests. Collaborate with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Document test plans and drive technical reviews of plans and proofs with design and architecture teams. Maintain and improve existing functional verification infrastructure and methodology. Understand the binary decision diagram (BDD) and data flow graph (DFG) for data paths and resolve the BDD complexity on arithmetic. Apply understanding of modeling architecture to simplify and model the problem and use tools to formally prove protocols and architectures. Mindset We're Seeking
Intellectual Curiosity – question assumptions, dig deeper, and identify verification gaps others might miss. Collaborative Excellence – thrive in cross‑functional partnerships, working seamlessly with architects, designers, and fellow verification engineers. Technical Leadership – distill complex formal verification concepts into clear, actionable insights for diverse technical audiences. Adaptive Innovation – pivot gracefully when designs evolve, turning challenges into opportunities for verification breakthroughs. Results‑Driven Impact – obsess with delivering verification quality that gives Intel absolute confidence in our silicon. Minimum Qualifications
You must possess a B.S. in Computer Engineering/Electrical Engineering or any STEM Degree with 6+ years of experience listed below; OR a M.S. with 4+ years of experience listed below; OR a Ph.D. with 6+ months of experience listed below. Computer architecture knowledge with emphasis on out‑of‑order processor execution, memory hierarchy, and memory management. Hands‑on experience with industry standard formal verification tools such as JasperGold, Questa Formal, VC Formal. Experience with formal abstractions and other complexity reduction techniques. Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools. Experience in assertion writing, checker development, coverage analysis, failure debug, root cause analysis. Preferred Qualifications
Knowledge of Intel Architecture ISA and system architecture, x86 assembly language. Post‑silicon debug and analysis. Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement. Experience with applying sequential equivalence checking in complex micro‑architectures. Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc. Intel or industry experience in pre‑silicon verification of CPU cores, including specific areas of technical ownership/expertise relevant to CPUs. Job Type
Experienced Hire Shift
Shift 1 (United States of America) Primary Location
US, Oregon, Hillsboro Additional Locations
US, California, Santa Clara; US, Texas, Austin Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 EEO Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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Get AI-powered advice on this job and more exclusive features. Join Intel's Silicon Engineering Group (SiG)
As part of our elite engineering organization, you'll be at the forefront of semiconductor innovation, transforming cutting‑edge concepts into the silicon that drives everything from personal devices to massive data centers and emerging edge technologies. Mission
Architect the Future of Server Computing – your expertise directly impacts Intel's next‑generation server CPUs, the engines powering cloud infrastructure, AI workloads, and enterprise computing worldwide. Responsibilities
Conduct verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms. Create comprehensive formal verification test and coverage plans including definition of formal verification scope, strategy, and techniques. Develop abstraction models for convergence on the design, carve out the right boundaries for the design, and track, verify, and apply abstraction techniques. Develop formal proofs to implement the verification plan, review the completed proofs, and develop new formal verification methodologies. Perform convergence on design by creating formal verification methodology, abstraction, and simulation techniques. Find and implement corrective measures to resolve failing tests. Collaborate with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Document test plans and drive technical reviews of plans and proofs with design and architecture teams. Maintain and improve existing functional verification infrastructure and methodology. Understand the binary decision diagram (BDD) and data flow graph (DFG) for data paths and resolve the BDD complexity on arithmetic. Apply understanding of modeling architecture to simplify and model the problem and use tools to formally prove protocols and architectures. Mindset We're Seeking
Intellectual Curiosity – question assumptions, dig deeper, and identify verification gaps others might miss. Collaborative Excellence – thrive in cross‑functional partnerships, working seamlessly with architects, designers, and fellow verification engineers. Technical Leadership – distill complex formal verification concepts into clear, actionable insights for diverse technical audiences. Adaptive Innovation – pivot gracefully when designs evolve, turning challenges into opportunities for verification breakthroughs. Results‑Driven Impact – obsess with delivering verification quality that gives Intel absolute confidence in our silicon. Minimum Qualifications
You must possess a B.S. in Computer Engineering/Electrical Engineering or any STEM Degree with 6+ years of experience listed below; OR a M.S. with 4+ years of experience listed below; OR a Ph.D. with 6+ months of experience listed below. Computer architecture knowledge with emphasis on out‑of‑order processor execution, memory hierarchy, and memory management. Hands‑on experience with industry standard formal verification tools such as JasperGold, Questa Formal, VC Formal. Experience with formal abstractions and other complexity reduction techniques. Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools. Experience in assertion writing, checker development, coverage analysis, failure debug, root cause analysis. Preferred Qualifications
Knowledge of Intel Architecture ISA and system architecture, x86 assembly language. Post‑silicon debug and analysis. Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement. Experience with applying sequential equivalence checking in complex micro‑architectures. Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc. Intel or industry experience in pre‑silicon verification of CPU cores, including specific areas of technical ownership/expertise relevant to CPUs. Job Type
Experienced Hire Shift
Shift 1 (United States of America) Primary Location
US, Oregon, Hillsboro Additional Locations
US, California, Santa Clara; US, Texas, Austin Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 EEO Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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