Wise Equation Solutions Inc.
Senior SoC Verification Engineer (UVM)
Wise Equation Solutions Inc., Austin, Texas, us, 78716
8+ years
of experience in ASIC/SoC verification. Strong hands-on experience with
SystemVerilog and UVM methodology . Proficiency in
testbench architecture , stimulus generation, and scoreboard implementation. Experience with major EDA tools such as
Synopsys VCS, Cadence Xcelium, or Mentor Questa . Solid understanding of
AMBA protocols (AXI/AHB/APB)
and on-chip interconnects. Familiarity with
C/C++ and scripting languages (Python/Perl/Shell) . Strong debug and problem-solving skills. Excellent communication and teamwork abilities.
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of experience in ASIC/SoC verification. Strong hands-on experience with
SystemVerilog and UVM methodology . Proficiency in
testbench architecture , stimulus generation, and scoreboard implementation. Experience with major EDA tools such as
Synopsys VCS, Cadence Xcelium, or Mentor Questa . Solid understanding of
AMBA protocols (AXI/AHB/APB)
and on-chip interconnects. Familiarity with
C/C++ and scripting languages (Python/Perl/Shell) . Strong debug and problem-solving skills. Excellent communication and teamwork abilities.
#J-18808-Ljbffr