SPACE EXPLORATION TECHNOLOGIES CORP
Sr. ASIC Design Verification Engineer (Silicon Engineering)
SPACE EXPLORATION TECHNOLOGIES CORP, Irvine, California, United States, 92713
Overview
Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SpaceX is leveraging its experience in rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation, providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers, and the software that brings it all together. We’re seeking best-in-class engineers to maximize Starlink’s utility for communities and businesses around the globe. SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) We are developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your work will help deliver solutions that expand the performance and capabilities of the Starlink network. Responsibilities
Responsible for digital ASIC verification at block and system level Write and review test plans, develop test harnesses and test sequences Responsible for test plan execution, running regressions, code and functional coverage closure Contribute towards pre-silicon verification, chip bring-up and post-silicon validation Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs Basic Qualifications
Bachelor’s degree in electrical engineering or computer engineering 5+ years of experience with design verification and test bench development Preferred Skills and Experience
Advanced degree in electrical engineering or computer engineering Experience with verification methodologies such as UVM/OVM/VMM Strong object-oriented programming knowledge Strong problem-solving and coding skills Experience in constrained random verification Expertise in developing test plans, implementing coverage models, and analyzing results Experience with scripting languages, e.g. Python for automation RTL design, chip bring-up, and post-silicon validation experience Ability to work in a dynamic environment with changing needs and requirements Additional Requirements
Must be willing to work extended hours and weekends as needed Compensation & Benefits
Pay range for Design Verification Engineer / Senior: $160,000.00 - $220,000.00 per year. Your actual level and base salary will be determined on a case-by-case basis based on job-related knowledge, education, and experience. Base salary is part of SpaceX’s total rewards package, which may include long-term incentives (stock or options), discretionary bonuses, and stock purchase opportunities. Comprehensive medical, vision, and dental coverage; 401(k) plan; disability and life insurance; paid parental leave; vacation and holidays; and other perks are available. Exempt employees receive paid sick leave as applicable. Equal Opportunity Employer
SpaceX is an Equal Opportunity Employer. Employment is governed on the basis of merit, competence and qualifications and will not be influenced by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, or any other legally protected status.
#J-18808-Ljbffr
Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SpaceX is leveraging its experience in rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation, providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers, and the software that brings it all together. We’re seeking best-in-class engineers to maximize Starlink’s utility for communities and businesses around the globe. SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) We are developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your work will help deliver solutions that expand the performance and capabilities of the Starlink network. Responsibilities
Responsible for digital ASIC verification at block and system level Write and review test plans, develop test harnesses and test sequences Responsible for test plan execution, running regressions, code and functional coverage closure Contribute towards pre-silicon verification, chip bring-up and post-silicon validation Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs Basic Qualifications
Bachelor’s degree in electrical engineering or computer engineering 5+ years of experience with design verification and test bench development Preferred Skills and Experience
Advanced degree in electrical engineering or computer engineering Experience with verification methodologies such as UVM/OVM/VMM Strong object-oriented programming knowledge Strong problem-solving and coding skills Experience in constrained random verification Expertise in developing test plans, implementing coverage models, and analyzing results Experience with scripting languages, e.g. Python for automation RTL design, chip bring-up, and post-silicon validation experience Ability to work in a dynamic environment with changing needs and requirements Additional Requirements
Must be willing to work extended hours and weekends as needed Compensation & Benefits
Pay range for Design Verification Engineer / Senior: $160,000.00 - $220,000.00 per year. Your actual level and base salary will be determined on a case-by-case basis based on job-related knowledge, education, and experience. Base salary is part of SpaceX’s total rewards package, which may include long-term incentives (stock or options), discretionary bonuses, and stock purchase opportunities. Comprehensive medical, vision, and dental coverage; 401(k) plan; disability and life insurance; paid parental leave; vacation and holidays; and other perks are available. Exempt employees receive paid sick leave as applicable. Equal Opportunity Employer
SpaceX is an Equal Opportunity Employer. Employment is governed on the basis of merit, competence and qualifications and will not be influenced by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, or any other legally protected status.
#J-18808-Ljbffr