Langham Recruitment
Overview
Location: Berlin, Germany - Hybrid / Remote. Are you ready to take on the challenge of designing next-generation electro-optical transceiver chips? We are seeking an Electronics IC Layout Engineer to join a highly skilled international team developing cutting-edge silicon photonics-based interconnect solutions for high-speed data centres.
Responsibilities
Develop layouts for high-speed integrated circuit blocks enabling advanced photonic data transmission
Carry out block- and core-level verification (LVS, DRC, ERC, EMIR)
Collaborate closely with photonic design and system engineering teams
Apply consistent layout methodologies and support scalable design environments
What We’re Looking For
B.Sc. in Electrical Engineering or related field
3+ years of industry experience in IC layout (RF experience preferred)
Proficiency with EIC design and layout tools (e.g., Cadence Design Framework)
Strong knowledge of chip-level layout flows and DFM practices
Familiarity with BiCMOS process technologies (a plus)
Proactive problem-solving skills and a strong commitment to quality
Excellent teamwork and communication skills in a dynamic, international environment
Fluency in English (German is an asset)
What’s on Offer
Stock Options
High degree of personal responsibility within a flat hierarchy
Career development opportunities in an expanding international team
Exciting opportunity to work on cutting-edge technologies in a high-tech environment in Berlin
#J-18808-Ljbffr
Responsibilities
Develop layouts for high-speed integrated circuit blocks enabling advanced photonic data transmission
Carry out block- and core-level verification (LVS, DRC, ERC, EMIR)
Collaborate closely with photonic design and system engineering teams
Apply consistent layout methodologies and support scalable design environments
What We’re Looking For
B.Sc. in Electrical Engineering or related field
3+ years of industry experience in IC layout (RF experience preferred)
Proficiency with EIC design and layout tools (e.g., Cadence Design Framework)
Strong knowledge of chip-level layout flows and DFM practices
Familiarity with BiCMOS process technologies (a plus)
Proactive problem-solving skills and a strong commitment to quality
Excellent teamwork and communication skills in a dynamic, international environment
Fluency in English (German is an asset)
What’s on Offer
Stock Options
High degree of personal responsibility within a flat hierarchy
Career development opportunities in an expanding international team
Exciting opportunity to work on cutting-edge technologies in a high-tech environment in Berlin
#J-18808-Ljbffr