Headway Technologies
Process Development Engineer
Headway Technologies, Milpitas, California, United States, 95035
TITLE: DRY ETCH PROCESS DEVELOPMENT ENGINEER
FLSA STATUS:
EXEMPT
REPORTS TO:
DIRECTOR, DRY ETCH PROCESS DEVELOPMENT
SUMMARY:
Under the direction of the Director of Dry Etch Process Development, the Dry Etch Process Development Engineer is responsible for developing and implementing new RIE, IBE, and ashing processes for next‑generation magnetic recording heads. The role includes implementing new process control schemes that ensure product manufacturability, designing and conducting experiments, analyzing data, and presenting findings. The engineer is also tasked with researching, selecting, and qualifying new tools that improve efficiency and yield. This position is located in Milpitas, California.
ESSENTIAL FUNCTIONS:
Develop and implement new dry etch processes (RIE, IBE, and Ashing) for next‑generation magnetic recording heads.
Implement new process control schemes or methodologies that ensure product manufacturability.
Design and conduct experiments, analyze data, and develop recommendations for improving performance and yield while reducing scrap.
Adhere to appropriate timelines for introducing new processes into the manufacturing line.
Review characterization data from FIB, SEM, and TEM tools to conduct root‑cause analysis and recommend corrective action.
Partner with other groups and departments, including process and product engineering, to develop and deliver products and programs.
Oversee the work of Process Technicians to ensure accurate process execution and efficient wafer disposition.
Partner with Equipment Engineering to research, select, and qualify new RIE tools.
Adhere to all safety policies and procedures as required.
Perform other duties of a similar nature or level.
MINIMUM QUALIFICATIONS:
Bachelor’s degree in Materials Science, Physics, Electrical Engineering, or a related field; Master’s degree preferred.
One to three years of experience in magnetic recording head, hard disk drive, or semiconductor industry dry‑etch process development.
Experience working in a wafer fab manufacturing environment.
Experience with Statistical Process Control (SPC).
Proficiency in using Microsoft Office Applications.
KNOWLEDGE, SKILLS, AND ABILITIES:
Knowledge of semiconductor or HDD industry principles, practices, and techniques.
Knowledge of wafer fabrication processing techniques, including process development and integration practices.
Knowledge of Reactive Ion Etching (RIE), IBE, and Ashing principles, practices, and techniques.
Knowledge of TEM, SEM, and FIB and ability to analyze data from these sources to determine root cause of failure.
Knowledge and ability to use Microsoft Office applications to create spreadsheets, Word documents, and presentations.
Knowledge and ability to use Statistical Process Control (SPC) to analyze data, create reports, present findings, and recommend appropriate action.
Able to communicate effectively, both verbally and in writing, with all levels of contractors, consultants, employees, and management.
Able to work productively and collaboratively with all levels of employees and management.
Able to comply with all safety policies and procedures.
Demonstrated organizational and time‑management skills.
Demonstrated problem‑solving and troubleshooting skills.
Flexible and able to prioritize.
COMPENSATION:
The annual base salary for this full‑time position is between $120,818.00 and $177,675.00, plus a bonus target and benefits. The annual base pay range shown is subject to change and may be modified periodically.
WORKING CONDITIONS:
The Dry Etch Process Development Engineer works primarily in an office environment from Monday through Friday. The schedule may be altered from time to time to meet business or operational needs and may require occasional travel. The engineer may also work in a Class 100 ESD‑sensitive wafer fab manufacturing facility and will adhere to required safety and dress standards. Exposure to hazardous chemicals, fumes, or vapors and excessive noise from time to time is possible while in the wafer manufacturing facility. Typical duties include standing, walking, performing various fine grasping movements, bending, and twisting; operating a computer and other office equipment. Optional lifting up to 10 pounds may be required.
EEO STATEMENT:
TDK/Headway Technologies, Inc. provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, gender, national origin, age, disability, or genetics. Applicants requiring accommodation in order to complete the application process should contact the Headway Human Resources Department.
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FLSA STATUS:
EXEMPT
REPORTS TO:
DIRECTOR, DRY ETCH PROCESS DEVELOPMENT
SUMMARY:
Under the direction of the Director of Dry Etch Process Development, the Dry Etch Process Development Engineer is responsible for developing and implementing new RIE, IBE, and ashing processes for next‑generation magnetic recording heads. The role includes implementing new process control schemes that ensure product manufacturability, designing and conducting experiments, analyzing data, and presenting findings. The engineer is also tasked with researching, selecting, and qualifying new tools that improve efficiency and yield. This position is located in Milpitas, California.
ESSENTIAL FUNCTIONS:
Develop and implement new dry etch processes (RIE, IBE, and Ashing) for next‑generation magnetic recording heads.
Implement new process control schemes or methodologies that ensure product manufacturability.
Design and conduct experiments, analyze data, and develop recommendations for improving performance and yield while reducing scrap.
Adhere to appropriate timelines for introducing new processes into the manufacturing line.
Review characterization data from FIB, SEM, and TEM tools to conduct root‑cause analysis and recommend corrective action.
Partner with other groups and departments, including process and product engineering, to develop and deliver products and programs.
Oversee the work of Process Technicians to ensure accurate process execution and efficient wafer disposition.
Partner with Equipment Engineering to research, select, and qualify new RIE tools.
Adhere to all safety policies and procedures as required.
Perform other duties of a similar nature or level.
MINIMUM QUALIFICATIONS:
Bachelor’s degree in Materials Science, Physics, Electrical Engineering, or a related field; Master’s degree preferred.
One to three years of experience in magnetic recording head, hard disk drive, or semiconductor industry dry‑etch process development.
Experience working in a wafer fab manufacturing environment.
Experience with Statistical Process Control (SPC).
Proficiency in using Microsoft Office Applications.
KNOWLEDGE, SKILLS, AND ABILITIES:
Knowledge of semiconductor or HDD industry principles, practices, and techniques.
Knowledge of wafer fabrication processing techniques, including process development and integration practices.
Knowledge of Reactive Ion Etching (RIE), IBE, and Ashing principles, practices, and techniques.
Knowledge of TEM, SEM, and FIB and ability to analyze data from these sources to determine root cause of failure.
Knowledge and ability to use Microsoft Office applications to create spreadsheets, Word documents, and presentations.
Knowledge and ability to use Statistical Process Control (SPC) to analyze data, create reports, present findings, and recommend appropriate action.
Able to communicate effectively, both verbally and in writing, with all levels of contractors, consultants, employees, and management.
Able to work productively and collaboratively with all levels of employees and management.
Able to comply with all safety policies and procedures.
Demonstrated organizational and time‑management skills.
Demonstrated problem‑solving and troubleshooting skills.
Flexible and able to prioritize.
COMPENSATION:
The annual base salary for this full‑time position is between $120,818.00 and $177,675.00, plus a bonus target and benefits. The annual base pay range shown is subject to change and may be modified periodically.
WORKING CONDITIONS:
The Dry Etch Process Development Engineer works primarily in an office environment from Monday through Friday. The schedule may be altered from time to time to meet business or operational needs and may require occasional travel. The engineer may also work in a Class 100 ESD‑sensitive wafer fab manufacturing facility and will adhere to required safety and dress standards. Exposure to hazardous chemicals, fumes, or vapors and excessive noise from time to time is possible while in the wafer manufacturing facility. Typical duties include standing, walking, performing various fine grasping movements, bending, and twisting; operating a computer and other office equipment. Optional lifting up to 10 pounds may be required.
EEO STATEMENT:
TDK/Headway Technologies, Inc. provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, gender, national origin, age, disability, or genetics. Applicants requiring accommodation in order to complete the application process should contact the Headway Human Resources Department.
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