Samsung Semiconductor
Senior Staff Engineer, Serdes Layout Design
Samsung Semiconductor, San Jose, California, United States, 95199
Senior Staff Engineer, Serdes Layout Design
Samsung Semiconductor
Location: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy.
What You’ll Do
As a senior high‑speed mixed‑signal layout/analog layout engineer, you will be working with circuit designers located in San Jose, CA to accomplish layout tasks. Circuits that you will need to work on include high‑speed RX (receiver), TX (transmitters), PLL, CDR, analog reference circuits, and so on. You should have experience doing layout with sub‑micron CMOS technologies.
Work with remote circuit designers to determine the chip floorplan. Come up with strategies to optimize the parasitics, reduce area, and improve high‑speed SERDES/analog performance.
Estimate schedule and create a plan to get things done within a dedicated time frame.
Read the design document provided by the foundry and resolve issues such as latch‑up and DRC.
Perform custom layout using Virtuoso and ensure LVS/DRC cleanliness.
Familiar with CAD tools, including Virtuoso, Calibre LVS, DRC, SkillCad, and so on.
Experience on chip level design, like bump, pad, and ESD strategies.
Good communication skills to discuss with circuit designers.
What You Bring
Bachelor’s with 15+ years, Master’s with 13+ years, or PhD with 10+ years of experience.
Experience in RF/analog/mixed‑signal/Serdes layout design of deep sub‑micron CMOS circuits and recent experience on advanced nodes including FinFET and GAA technologies.
High proficiency in interpreting Calibre DRC, ERC, LVS reports.
Familiarity with analog/mixed‑signal related circuit layout, including high‑speed I/O blocks such as comparator/transmitter/receiver/PLL.
Experience with Cadence or Mentor Graphics layout tools.
Good communication skills with design leads and engineers for schedule planning.
Experience leading a complicated layout project and successfully tape‑out.
Programming knowledge in SKILL, Perl, and/or Python is a bonus.
Inclusive, collaborative, and innovative attitude.
What We Offer
Base pay range: $180,950—$289,050 USD. Incentive opportunities reward employees based on individual and company performance.
Benefits include medical, dental, vision, 401(k), and an inclusive rewards plan to support wellbeing. Employees enjoy paid time off (4+ weeks), holidays, and sick leave. The company offers fertility care or adoption support, medical travel assistance, errand services, on‑demand mental health apps, and paid therapy sessions.
We provide a flexible environment with onsite café, gym, and virtual fitness classes to support physical health. Onsite facilities include a café and gym, and virtual classes for convenience.
Equal Opportunity Employment Policy Samsung Semiconductor is an equal‑opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.
Applicants receive accommodations throughout the recruiting process for disabilities, neurodivergent individuals, or pregnancy‑related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.
Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.
Applicant AI Use Policy In order to ensure a fair and authentic assessment, Samsung Semiconductor prohibits the use of generative AI tools to misrepresent a candidate’s true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research; all submitted content and interview responses must reflect the candidate’s genuine abilities and experience. Violation may result in immediate disqualification.
Applicant Privacy Policy https://semiconductor.samsung.com/about-us/careers/us/privacy/
#J-18808-Ljbffr
Samsung Semiconductor
Location: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy.
What You’ll Do
As a senior high‑speed mixed‑signal layout/analog layout engineer, you will be working with circuit designers located in San Jose, CA to accomplish layout tasks. Circuits that you will need to work on include high‑speed RX (receiver), TX (transmitters), PLL, CDR, analog reference circuits, and so on. You should have experience doing layout with sub‑micron CMOS technologies.
Work with remote circuit designers to determine the chip floorplan. Come up with strategies to optimize the parasitics, reduce area, and improve high‑speed SERDES/analog performance.
Estimate schedule and create a plan to get things done within a dedicated time frame.
Read the design document provided by the foundry and resolve issues such as latch‑up and DRC.
Perform custom layout using Virtuoso and ensure LVS/DRC cleanliness.
Familiar with CAD tools, including Virtuoso, Calibre LVS, DRC, SkillCad, and so on.
Experience on chip level design, like bump, pad, and ESD strategies.
Good communication skills to discuss with circuit designers.
What You Bring
Bachelor’s with 15+ years, Master’s with 13+ years, or PhD with 10+ years of experience.
Experience in RF/analog/mixed‑signal/Serdes layout design of deep sub‑micron CMOS circuits and recent experience on advanced nodes including FinFET and GAA technologies.
High proficiency in interpreting Calibre DRC, ERC, LVS reports.
Familiarity with analog/mixed‑signal related circuit layout, including high‑speed I/O blocks such as comparator/transmitter/receiver/PLL.
Experience with Cadence or Mentor Graphics layout tools.
Good communication skills with design leads and engineers for schedule planning.
Experience leading a complicated layout project and successfully tape‑out.
Programming knowledge in SKILL, Perl, and/or Python is a bonus.
Inclusive, collaborative, and innovative attitude.
What We Offer
Base pay range: $180,950—$289,050 USD. Incentive opportunities reward employees based on individual and company performance.
Benefits include medical, dental, vision, 401(k), and an inclusive rewards plan to support wellbeing. Employees enjoy paid time off (4+ weeks), holidays, and sick leave. The company offers fertility care or adoption support, medical travel assistance, errand services, on‑demand mental health apps, and paid therapy sessions.
We provide a flexible environment with onsite café, gym, and virtual fitness classes to support physical health. Onsite facilities include a café and gym, and virtual classes for convenience.
Equal Opportunity Employment Policy Samsung Semiconductor is an equal‑opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.
Applicants receive accommodations throughout the recruiting process for disabilities, neurodivergent individuals, or pregnancy‑related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.
Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.
Applicant AI Use Policy In order to ensure a fair and authentic assessment, Samsung Semiconductor prohibits the use of generative AI tools to misrepresent a candidate’s true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research; all submitted content and interview responses must reflect the candidate’s genuine abilities and experience. Violation may result in immediate disqualification.
Applicant Privacy Policy https://semiconductor.samsung.com/about-us/careers/us/privacy/
#J-18808-Ljbffr