Energy Jobline ZR
Machine Learning Architect in Palo Alto
Energy Jobline ZR, Palo Alto, California, United States, 94306
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About this role
We are looking for a world-class ML leader to architect and own our AI roadmap. This is a foundational role that will work closely with the founders to define the technical trajectory across our platform, including code, reinforcement learning, layout optimization, etc. You will lead a growing ML team and work cross‑functionally to turn cutting‑edge research into usable tools for chip engineers. You should bring deep expertise in ML for chip design, as well as leadership experience in high‑performance engineering teams. Responsibilities
Contribute to building the ML roadmap and research strategy for architecture across RTL and PD domains. Architect and deploy novel agent‑based systems, including fine‑tuning models for RTL code, physical design tasks automation, and hardware problem reasoning. Lead, mentor, and scale a team of top‑tier ML engineers. Guide research direction, implementation standards, and modeling infrastructure. Interface with hardware engineers to identify bottlenecks in chip design pipelines that ML can solve. Stay ahead of state‑of‑the‑art techniques in ML4EDA, agent orchestration, and model compression/deployment. Tech stack
Python, PyTorch, RL libraries, Transformers, MLOPs, JavaScript, TypeScript, Linux, RTL code, Physical Design Automation, Hardware Problem Reasoning, Agentic Systems, Fine‑tuning Models, Multi‑agent Orchestration, Reinforcement Learning If you are interested in applying for this job please press the Apply Button and follow the application process. Energy Jobline wishes you the very best of luck in your next career move.
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We are looking for a world-class ML leader to architect and own our AI roadmap. This is a foundational role that will work closely with the founders to define the technical trajectory across our platform, including code, reinforcement learning, layout optimization, etc. You will lead a growing ML team and work cross‑functionally to turn cutting‑edge research into usable tools for chip engineers. You should bring deep expertise in ML for chip design, as well as leadership experience in high‑performance engineering teams. Responsibilities
Contribute to building the ML roadmap and research strategy for architecture across RTL and PD domains. Architect and deploy novel agent‑based systems, including fine‑tuning models for RTL code, physical design tasks automation, and hardware problem reasoning. Lead, mentor, and scale a team of top‑tier ML engineers. Guide research direction, implementation standards, and modeling infrastructure. Interface with hardware engineers to identify bottlenecks in chip design pipelines that ML can solve. Stay ahead of state‑of‑the‑art techniques in ML4EDA, agent orchestration, and model compression/deployment. Tech stack
Python, PyTorch, RL libraries, Transformers, MLOPs, JavaScript, TypeScript, Linux, RTL code, Physical Design Automation, Hardware Problem Reasoning, Agentic Systems, Fine‑tuning Models, Multi‑agent Orchestration, Reinforcement Learning If you are interested in applying for this job please press the Apply Button and follow the application process. Energy Jobline wishes you the very best of luck in your next career move.
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