SK hynix America
Sr. Analog/Mixed-Signal Circuit Design Engineer
SK hynix America, San Jose, California, United States, 95199
Sr. Analog/Mixed-Signal Circuit Design Engineer
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This range is provided by SK hynix America. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
SK hynix America is a global leader in semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a forefront of DRAM and NAND flash technologies, we drive mobile, cloud, and future tech innovations while committing to sustainability, AI, machine learning, and eco‑friendly practices.
Job Summary
Senior Analog/Mixed‑Signal Circuit Design Engineer tasked with designing and implementing high‑performance analog and mixed‑signal circuits for next‑generation memory and interface solutions.
Responsibilities
Design analog/mixed‑signal circuits such as wireline transmitters/receivers, equalizers (CTLE/DFE), PLLs, CDRs, ADCs, DACs, voltage regulators, and bandgap references.
Collaborate with cross‑functional teams to define system and circuit specifications and architecture.
Perform schematic design, simulation, and silicon validation for circuit blocks.
Supervise and guide layout/mask designers, providing floorplan and layout guidelines for optimal performance and area efficiency.
Analyze circuit performance and support design sign‑off and characterization.
Document design methodology and contribute to continuous improvement of design flows.
Qualifications
BS in Electrical Engineering or a related field plus a minimum of 7 years of industry experience in analog and/or mixed‑signal circuit design (or MS plus a minimum of 5 years).
Solid understanding of analog and mixed‑signal fundamentals including noise, matching, parasitics, and feedback systems.
Proven hands‑on design experience in wireline transmitters/receivers, equalizers (CTLE/DFE), PLLs, CDRs, ADCs, DACs, voltage regulators, or bandgap references.
Understanding of mixed‑signal verification and post‑silicon validation techniques.
Ability to lead and coordinate with layout/mask teams and provide clear design guidance.
Strong collaboration, communication, and problem‑solving skills.
Preferred Qualifications
Ph.D. in Electrical Engineering or a related field.
Experience in high‑speed interface design (PCIe, MIPI, SerDes, UCIe, memory interfaces, or other high‑speed interface standards).
Familiarity with advanced FinFET process.
Knowledge of circuit modeling using Verilog‑A, MATLAB, etc.
Knowledge of hardware description languages (Verilog/SystemVerilog).
Experience with automation scripting (Python, Perl, Tcl, etc.) to enhance design efficiency.
Top‑tier health insurance at no employee cost.
Paid day offs: PTO + Company Holidays + Happy Fridays.
Paid Parental Leave Program.
401k matching.
Educational reimbursement up to $10,000 per year.
Donation matching and volunteering opportunities.
Free breakfast, lunch, and dinner provided to employees.
Seniority Level Mid‑Senior level
Employment Type Full‑time
Job Function Semiconductor Manufacturing
Compensation Pay range: $175,000 – $200,000 USD per year. Compensation varies by market, location, and experience. Your recruiter can share specific salary details.
SKHYA is an Equal Employment Opportunity Employer. We provide equal employment opportunities to all qualified applicants and employees and prohibit discrimination and harassment of any type without regard to race, sex, pregnancy, sexual orientation, religion, age, gender identity, national origin, color, protected veteran or disability status, genetic information or any other status protected under federal, state, or local applicable laws.
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This range is provided by SK hynix America. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
SK hynix America is a global leader in semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a forefront of DRAM and NAND flash technologies, we drive mobile, cloud, and future tech innovations while committing to sustainability, AI, machine learning, and eco‑friendly practices.
Job Summary
Senior Analog/Mixed‑Signal Circuit Design Engineer tasked with designing and implementing high‑performance analog and mixed‑signal circuits for next‑generation memory and interface solutions.
Responsibilities
Design analog/mixed‑signal circuits such as wireline transmitters/receivers, equalizers (CTLE/DFE), PLLs, CDRs, ADCs, DACs, voltage regulators, and bandgap references.
Collaborate with cross‑functional teams to define system and circuit specifications and architecture.
Perform schematic design, simulation, and silicon validation for circuit blocks.
Supervise and guide layout/mask designers, providing floorplan and layout guidelines for optimal performance and area efficiency.
Analyze circuit performance and support design sign‑off and characterization.
Document design methodology and contribute to continuous improvement of design flows.
Qualifications
BS in Electrical Engineering or a related field plus a minimum of 7 years of industry experience in analog and/or mixed‑signal circuit design (or MS plus a minimum of 5 years).
Solid understanding of analog and mixed‑signal fundamentals including noise, matching, parasitics, and feedback systems.
Proven hands‑on design experience in wireline transmitters/receivers, equalizers (CTLE/DFE), PLLs, CDRs, ADCs, DACs, voltage regulators, or bandgap references.
Understanding of mixed‑signal verification and post‑silicon validation techniques.
Ability to lead and coordinate with layout/mask teams and provide clear design guidance.
Strong collaboration, communication, and problem‑solving skills.
Preferred Qualifications
Ph.D. in Electrical Engineering or a related field.
Experience in high‑speed interface design (PCIe, MIPI, SerDes, UCIe, memory interfaces, or other high‑speed interface standards).
Familiarity with advanced FinFET process.
Knowledge of circuit modeling using Verilog‑A, MATLAB, etc.
Knowledge of hardware description languages (Verilog/SystemVerilog).
Experience with automation scripting (Python, Perl, Tcl, etc.) to enhance design efficiency.
Top‑tier health insurance at no employee cost.
Paid day offs: PTO + Company Holidays + Happy Fridays.
Paid Parental Leave Program.
401k matching.
Educational reimbursement up to $10,000 per year.
Donation matching and volunteering opportunities.
Free breakfast, lunch, and dinner provided to employees.
Seniority Level Mid‑Senior level
Employment Type Full‑time
Job Function Semiconductor Manufacturing
Compensation Pay range: $175,000 – $200,000 USD per year. Compensation varies by market, location, and experience. Your recruiter can share specific salary details.
SKHYA is an Equal Employment Opportunity Employer. We provide equal employment opportunities to all qualified applicants and employees and prohibit discrimination and harassment of any type without regard to race, sex, pregnancy, sexual orientation, religion, age, gender identity, national origin, color, protected veteran or disability status, genetic information or any other status protected under federal, state, or local applicable laws.
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