Everest Consultants, Inc.
Title
ICs System Architect
Duration Permanent, Full-time
Salary $140,000.00/yr - $190,000.00/yr
Work Authorization Candidates must have valid U.S. work authorization at the time of hire. Visa support available via H1 transfer only.
Position Description Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals with a vision for the future, a desire to impact the world, and a drive to turn innovative ideas into reality. They are building development teams to design the next generation of mixed-signal ICs for advanced communication systems. The team is currently seeking a skilled and motivated ICs System Architect to lead the architecture and design of complex mixed-signal systems, ensuring optimal performance and integration across analog and digital domains.
In this role, significant experience modeling data converters or radio systems in MATLAB will be applied to design, simulate, and measure high‑speed ICs using CMOS and CML circuits. A deep understanding of communication systems and standards, and their application to various wireless and wire‑line applications, is required. Expertise should cover at least three of the following areas: Digital‑Analog Converters, Serializers and De‑serializers, Wideband Output Drivers, High‑Performance Phase Locked Loops, Low Noise Clock Designs, Operational Amplifiers, Variable Gain Amplifiers, and DSP Equalization and Compensation Techniques.
Independent work is expected while coordinating closely with IC designers to drive the development of high‑performance systems. The ability to work effectively in a team, share expertise, and resolve technical issues will be essential. Occasional travel to European and U.S. locations may be required. Candidates must be U.S. residents with valid work authorization.
Additionally, experience in mixed‑signal circuit design, BiCMOS IC design, and Analog Design Flow (e.g., Cadence Virtuoso, Xcelium, AMS‑Designer, Verilog‑AMS, Spectre) will be highly valuable, along with familiarity with SERDES transmitter and receiver design (e.g., CDR, DFE, CTLE, jitter modeling).
Position Responsibilities
Architect and work on many different modules within our devices and work with leaders in the design of world‑class data converters. These devices integrate large high‑frequency (> 30 GHz) analog blocks along with complex digital blocks to create custom System on Chip (SoC) solutions.
Develop cutting‑edge SoCs for communication systems according to customer specifications, finding optimum trade‑offs between system performance, power dissipation, and cost.
Drive block specifications for the design team.
Develop, run and maintain data converter system MATLAB and Verilog models for an SoC across various usage modes.
Work with analog and digital implementation teams to ensure proper development of system designs.
Create and own chip‑level simulations that verify data converter operating modes are implemented correctly.
Collaborate with ASIC design groups based in Europe and locally.
Position Qualifications
M.S. or Ph.D. in Computer Science, Electrical or Computer Engineering, or other relevant engineering degree.
Minimum of 5 years of relevant work experience with an M.S. or 3 years of experience with a Ph.D.
Significant experience modeling data converters or radio systems in MATLAB.
Good knowledge of communication systems/standards and their application to different wireless and wire‑line applications.
Ability to simulate entire signal path in a mixed‑signal flow.
Deep understanding of design, simulation and measurements of high‑speed ICs using CMOS and CML circuits in at least 3 of these areas: Digital‑Analog Converters, Serializers and de‑serializers, Wideband Output Drivers, High‑Performance Phase Locked Loops, Low Noise clock designs, Operational Amplifiers and Variable Gain Amplifiers, and DSP Equalization and compensation techniques.
Self‑driven, ability to work independently while coordinating with IC designers.
Available to travel occasionally to European and U.S. locations.
Candidates must be current U.S. residents with valid work authorization.
Work effectively in a group setting (share expertise, provide and receive feedback, communicate technical issues).
Additional desirable qualifications include:
Experience performing mixed‑signal circuit design across analog and digital domains, BiCMOS IC design experience.
Experience with an Analog Design Flow (e.g., Cadence Virtuoso, Xcelium, AMS‑Designer, Verilog‑AMS, Spectre).
SERDES transmitter and receiver design (e.g., CDR, DFE, CTLE, jitter modelling).
References for prior achievements in high‑performance mixed‑signal IC design may be requested.
Benefits Our client offers medical, dental, & vision insurance, short‑term and long‑term disability, life and AD&D insurance, 401(k) retirement plan, paid holidays, and vacation.
Seniority level Mid‑Senior level
Employment type Full‑time
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Duration Permanent, Full-time
Salary $140,000.00/yr - $190,000.00/yr
Work Authorization Candidates must have valid U.S. work authorization at the time of hire. Visa support available via H1 transfer only.
Position Description Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals with a vision for the future, a desire to impact the world, and a drive to turn innovative ideas into reality. They are building development teams to design the next generation of mixed-signal ICs for advanced communication systems. The team is currently seeking a skilled and motivated ICs System Architect to lead the architecture and design of complex mixed-signal systems, ensuring optimal performance and integration across analog and digital domains.
In this role, significant experience modeling data converters or radio systems in MATLAB will be applied to design, simulate, and measure high‑speed ICs using CMOS and CML circuits. A deep understanding of communication systems and standards, and their application to various wireless and wire‑line applications, is required. Expertise should cover at least three of the following areas: Digital‑Analog Converters, Serializers and De‑serializers, Wideband Output Drivers, High‑Performance Phase Locked Loops, Low Noise Clock Designs, Operational Amplifiers, Variable Gain Amplifiers, and DSP Equalization and Compensation Techniques.
Independent work is expected while coordinating closely with IC designers to drive the development of high‑performance systems. The ability to work effectively in a team, share expertise, and resolve technical issues will be essential. Occasional travel to European and U.S. locations may be required. Candidates must be U.S. residents with valid work authorization.
Additionally, experience in mixed‑signal circuit design, BiCMOS IC design, and Analog Design Flow (e.g., Cadence Virtuoso, Xcelium, AMS‑Designer, Verilog‑AMS, Spectre) will be highly valuable, along with familiarity with SERDES transmitter and receiver design (e.g., CDR, DFE, CTLE, jitter modeling).
Position Responsibilities
Architect and work on many different modules within our devices and work with leaders in the design of world‑class data converters. These devices integrate large high‑frequency (> 30 GHz) analog blocks along with complex digital blocks to create custom System on Chip (SoC) solutions.
Develop cutting‑edge SoCs for communication systems according to customer specifications, finding optimum trade‑offs between system performance, power dissipation, and cost.
Drive block specifications for the design team.
Develop, run and maintain data converter system MATLAB and Verilog models for an SoC across various usage modes.
Work with analog and digital implementation teams to ensure proper development of system designs.
Create and own chip‑level simulations that verify data converter operating modes are implemented correctly.
Collaborate with ASIC design groups based in Europe and locally.
Position Qualifications
M.S. or Ph.D. in Computer Science, Electrical or Computer Engineering, or other relevant engineering degree.
Minimum of 5 years of relevant work experience with an M.S. or 3 years of experience with a Ph.D.
Significant experience modeling data converters or radio systems in MATLAB.
Good knowledge of communication systems/standards and their application to different wireless and wire‑line applications.
Ability to simulate entire signal path in a mixed‑signal flow.
Deep understanding of design, simulation and measurements of high‑speed ICs using CMOS and CML circuits in at least 3 of these areas: Digital‑Analog Converters, Serializers and de‑serializers, Wideband Output Drivers, High‑Performance Phase Locked Loops, Low Noise clock designs, Operational Amplifiers and Variable Gain Amplifiers, and DSP Equalization and compensation techniques.
Self‑driven, ability to work independently while coordinating with IC designers.
Available to travel occasionally to European and U.S. locations.
Candidates must be current U.S. residents with valid work authorization.
Work effectively in a group setting (share expertise, provide and receive feedback, communicate technical issues).
Additional desirable qualifications include:
Experience performing mixed‑signal circuit design across analog and digital domains, BiCMOS IC design experience.
Experience with an Analog Design Flow (e.g., Cadence Virtuoso, Xcelium, AMS‑Designer, Verilog‑AMS, Spectre).
SERDES transmitter and receiver design (e.g., CDR, DFE, CTLE, jitter modelling).
References for prior achievements in high‑performance mixed‑signal IC design may be requested.
Benefits Our client offers medical, dental, & vision insurance, short‑term and long‑term disability, life and AD&D insurance, 401(k) retirement plan, paid holidays, and vacation.
Seniority level Mid‑Senior level
Employment type Full‑time
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