Logo
PER International

High Speed Analog IC Designer

PER International, San Jose, California, United States, 95199

Save Job

Global Technical Recruiter | Power Electronics, Semiconductors, AI & Software | US, UK & Europe | Engineering, Leadership & Commercial Roles 4 days ago Be among the first 25 applicants

Direct message the job poster from PER International

OVERVIEW Our client is a fast‑growing semiconductor design company developing cutting‑edge connectivity and high‑speed interface technologies for next‑generation computing and communication systems. The team is composed of industry veterans and innovative engineers who thrive in a collaborative environment focused on advanced analog, mixed‑signal, and high‑speed circuit solutions.

JOB SUMMARY We are seeking a highly skilled High Speed Analog IC Designer with deep technical expertise in high‑speed receiver design and advanced CMOS process technologies. The successful candidate will play a key role in the development of next‑generation high‑speed serial link circuits, contributing to the design, simulation, layout, and validation of complex analog and mixed‑signal blocks.

This position offers the opportunity to work on leading‑edge products in an innovative environment that values creativity, technical excellence, and teamwork.

KEY RESPONSIBILITIES

Design and verify high‑speed serial‐link receiver circuits such as CTLE, CDR, DFE, PLL, and related analog building blocks.

Perform circuit simulations, transistor‑level design, and optimization using deep sub‑micron CMOS technologies.

Collaborate with digital, packaging, and signal integrity teams to ensure system‑level performance and integration.

Conduct lab testing and validation of prototype circuits to verify performance against design specifications.

Analyze link budgets and contribute to system‑level architecture decisions for Rx/Tx/PLL integration.

Participate in design reviews, documentation, and cross‑functional collaboration to support product delivery.

QUALIFICATIONS

Hands‑on experience designing high‑speed receiver circuits (30G and above).

Strong background in deep sub‑micron CMOS technologies.

Practical experience with advanced process nodes (12nm, 6nm, 5nm, 4nm, 3nm, or 2nm).

Proficiency in analog/mixed‑signal simulation tools such as Spectre, SPICE, Matlab, Hsim, and Verilog.

Strong understanding of high‑speed serial‑link design fundamentals including equalization, timing recovery, and jitter analysis.

Lab experience evaluating prototype performance and debugging complex analog systems.

Excellent analytical and problem‑solving skills with a keen eye for circuit‑level optimization.

Master’s or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.

NICE TO HAVE

Experience with PAM4 112G/224G SerDes design.

Background in Signal Integrity (SI) and Power Integrity (PI) optimization.

Knowledge of high‑speed packaging design and PCB layout considerations

INTERESTED We are actively submitting candidates for this role. Reach out to

Jaimie Javier at PER International

on LinkedIn or email your CV to

jaimie@per‑international.com

to apply or learn more.

Referrals increase your chances of interviewing at PER International by 2x

Seniority level Mid‑Senior level

Employment type Full‑time

Job function Design and Engineering

Industries Semiconductor Manufacturing and Appliances, Electrical, and Electronics Manufacturing

#J-18808-Ljbffr