Synopsys Inc
Lead PCie Applications Engineer 12938
Synopsys Inc, Sunnyvale, California, United States, 94087
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We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
Role Overview This position requires a highly motivated and experienced person to work with Synopsys’ customers on integrating leading edge Interface IP (IIP) into their ASIC SoC/systems for next generation products. The role offers opportunities to work on Synopsys PCIe IP and the latest industry specifications/applications on various hot market segments.
You Are A hands-on technical leader with deep expertise in SerDes physical layer and mixed-signal design. You thrive in lab environments, enjoy complex problem solving, communicate clearly, adapt quickly, and collaborate effectively. You guide customers to success and master new products and methodologies within our technology stack.
You possess a deep understanding of the entire ASIC/SOC development flow, from RTL to GDSII to working silicon.
You are passionate about solving the most complex technical challenges and enjoy teaching others how to do the same.
You are as comfortable discussing architectural trade‑offs with a customer’s chief architect as you are diving into a netlist or silicon log file.
You are a proactive problem‑solver who takes full ownership of technical issues and drives them to resolution.
What You’ll Be Doing Technical Leadership & Mentorship
Act as the technical anchor and lead within the application engineering team.
Mentor and coach intermediate engineers on SOC methodologies, debug techniques, and best practices.
Participate in R&D technical reviews of customer designs, implementation strategies, and validation plans.
Develop and refine best practices, tools, and methodologies for the team.
Customer‑Facing IP Integration & Support
Serve as the primary technical expert for key customers, architecting and guiding the integration of our PCIe IP into their SOC designs.
Provide expert‑level guidance on front‑end and back‑end design challenges, including validation, synthesis, DFT/ATE, signal integrity/power integrity, physical design, etc.
Lead complex technical debug sessions, resolving critical issues related to design, timing, and power that arise during the customer’s implementation phase.
Tape‑Out and Silicon Bring‑Up
Own and drive the technical relationship with customers through the critical tape‑out phase.
Lead post‑silicon validation and debug activities, working closely with customers to bring up new silicon efficiently.
Analyze silicon data to correlate pre‑silicon models with post‑silicon performance and identify root causes of any anomalies.
Develop and utilize scripts and tools for automated silicon testing and data analysis.
Product & Methodology Enablement
Work closely with internal R&D and Design teams to gain early expertise on new IP, product features, and process technologies.
Provide critical, field‑driven feedback from customers to influence the architecture and design of future products.
Create advanced technical collateral, application notes, and training materials to enable both customers and the internal AE team on new products and methodologies.
What You’ll Need
BSc/MSc in Electrical Engineering or related fields.
15+ years of experience in ASIC/SOC design, implementation, or applications.
10+ years of experience with silicon bring‑up, characterization, and debugging.
Hands‑on, full‑flow experience with multiple tape‑outs and a deep understanding of the associated challenges.
Experience with industry‑standard interfaces and protocols (e.g., PCIe/CXL, Ethernet).
Demonstrated experience in a customer‑facing technical role or a lead role mentoring other engineers.
Ability to manage concurrent projects.
Preferred Experience
Experience with advanced technology processes (7nm/5nm/3nm) mixed‑signal IP or circuit design, implementation or technical support.
Domain knowledge in Die‑to‑Die and PCIe/CXL protocol are highly desirable.
Knowledge of advanced EDA tool products and expertise in P&R, Physical Verification, Signal Integrity/Power Integrity.
Knowledge of 2.5D/3D IC packaging and implementation.
Who You Are
Strong communicator and collaborator, organized and detail‑oriented, resilient and adaptable, committed to customer success.
The Impact You Will Have
Ensuring reliable, high‑performance chip solutions.
Building strong customer relationships.
Driving adoption of Synopsys IP technologies.
Speeding customer time‑to‑market.
Providing feedback to influence product development.
Strengthening Synopsys’ industry leadership.
The Team You’ll Be A Part Of Join a collaborative engineering team dedicated to supporting leading‑edge Interface IP integration and bring‑up for top semiconductor customers.
Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details on salary and rewards during the hiring process.
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We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
Role Overview This position requires a highly motivated and experienced person to work with Synopsys’ customers on integrating leading edge Interface IP (IIP) into their ASIC SoC/systems for next generation products. The role offers opportunities to work on Synopsys PCIe IP and the latest industry specifications/applications on various hot market segments.
You Are A hands-on technical leader with deep expertise in SerDes physical layer and mixed-signal design. You thrive in lab environments, enjoy complex problem solving, communicate clearly, adapt quickly, and collaborate effectively. You guide customers to success and master new products and methodologies within our technology stack.
You possess a deep understanding of the entire ASIC/SOC development flow, from RTL to GDSII to working silicon.
You are passionate about solving the most complex technical challenges and enjoy teaching others how to do the same.
You are as comfortable discussing architectural trade‑offs with a customer’s chief architect as you are diving into a netlist or silicon log file.
You are a proactive problem‑solver who takes full ownership of technical issues and drives them to resolution.
What You’ll Be Doing Technical Leadership & Mentorship
Act as the technical anchor and lead within the application engineering team.
Mentor and coach intermediate engineers on SOC methodologies, debug techniques, and best practices.
Participate in R&D technical reviews of customer designs, implementation strategies, and validation plans.
Develop and refine best practices, tools, and methodologies for the team.
Customer‑Facing IP Integration & Support
Serve as the primary technical expert for key customers, architecting and guiding the integration of our PCIe IP into their SOC designs.
Provide expert‑level guidance on front‑end and back‑end design challenges, including validation, synthesis, DFT/ATE, signal integrity/power integrity, physical design, etc.
Lead complex technical debug sessions, resolving critical issues related to design, timing, and power that arise during the customer’s implementation phase.
Tape‑Out and Silicon Bring‑Up
Own and drive the technical relationship with customers through the critical tape‑out phase.
Lead post‑silicon validation and debug activities, working closely with customers to bring up new silicon efficiently.
Analyze silicon data to correlate pre‑silicon models with post‑silicon performance and identify root causes of any anomalies.
Develop and utilize scripts and tools for automated silicon testing and data analysis.
Product & Methodology Enablement
Work closely with internal R&D and Design teams to gain early expertise on new IP, product features, and process technologies.
Provide critical, field‑driven feedback from customers to influence the architecture and design of future products.
Create advanced technical collateral, application notes, and training materials to enable both customers and the internal AE team on new products and methodologies.
What You’ll Need
BSc/MSc in Electrical Engineering or related fields.
15+ years of experience in ASIC/SOC design, implementation, or applications.
10+ years of experience with silicon bring‑up, characterization, and debugging.
Hands‑on, full‑flow experience with multiple tape‑outs and a deep understanding of the associated challenges.
Experience with industry‑standard interfaces and protocols (e.g., PCIe/CXL, Ethernet).
Demonstrated experience in a customer‑facing technical role or a lead role mentoring other engineers.
Ability to manage concurrent projects.
Preferred Experience
Experience with advanced technology processes (7nm/5nm/3nm) mixed‑signal IP or circuit design, implementation or technical support.
Domain knowledge in Die‑to‑Die and PCIe/CXL protocol are highly desirable.
Knowledge of advanced EDA tool products and expertise in P&R, Physical Verification, Signal Integrity/Power Integrity.
Knowledge of 2.5D/3D IC packaging and implementation.
Who You Are
Strong communicator and collaborator, organized and detail‑oriented, resilient and adaptable, committed to customer success.
The Impact You Will Have
Ensuring reliable, high‑performance chip solutions.
Building strong customer relationships.
Driving adoption of Synopsys IP technologies.
Speeding customer time‑to‑market.
Providing feedback to influence product development.
Strengthening Synopsys’ industry leadership.
The Team You’ll Be A Part Of Join a collaborative engineering team dedicated to supporting leading‑edge Interface IP integration and bring‑up for top semiconductor customers.
Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details on salary and rewards during the hiring process.
#J-18808-Ljbffr