Senior IC Package Design Engineer – SerDes & BGA

A leading semiconductor company in San Jose is looking for an experienced IC package-design engineer. You will design complex flip-chip-BGA packages for ASICs used in AI, networking, and HPC. This role requires managing multiple projects, focusing on signal integrity, and collaborating with a global team. A minimum of 12 years experience in package design is required, with knowledge of Cadence tools preferred. The position is full-time and on-site. #J-18808-Ljbffr