RTL & Logic Design Engineer — Memory Interface Expert

A leading technology company in Santa Clara is seeking an experienced Logic Design Engineer to work on graphics memory technologies. You will contribute to the development of high-performance designs for discrete GPUs and data center solutions. The ideal candidate should have over five years of experience in RTL development and a strong background in high-speed memory interfaces like HBM and GDDR. This role emphasizes collaboration and the ability to communicate effectively across teams. #J-18808-Ljbffr