Senior ASIC Verification Engineer - SoC & IP Validation

A leading technology company is seeking an experienced ASIC Design Verification Engineer in Sunnyvale, California. You will develop verification plans, lead cross-functional collaboration, and utilize advanced verification methodologies. Candidates should have a Bachelor's degree and extensive experience in SystemVerilog and UVM methodologies. Competitive compensation package includes a salary of $212,000 to $291,000 per year plus bonuses, equity, and benefits. #J-18808-Ljbffr