FPGA & ASIC Engineer — Silicon Innovation

A leading aerospace company in Redmond, WA, is seeking an FPGA/ASIC Engineer to design and optimize next-generation chips for Starlink. You'll work with cross-functional teams to enhance connectivity globally. The role requires a Bachelor's in a relevant field and at least 1 year of experience in RTL design. Competitive compensation includes potential bonuses and extensive benefits, with a salary range from $122,500 to $170,000 depending on experience. #J-18808-Ljbffr