Auradine
Job Title:
Standard Cell Characterization Engineer Location:
Santa Clara, CA / Bengaluru, India / Taipei, Taiwan Position Type:
Full-Time
About Us Auradine is a fast-growing, well-funded startup building scalable, sustainable, and secure infrastructure for blockchain and AI applications. Founded 2022 and backed by top-tier investors, our team includes veterans from Palo Alto Networks, Marvell, Intel, Google, and other leading tech companies. We are headquartered in Santa Clara, CA.
Role Overview You will own the cell characterization flow in Auradine and play a critical role in building the foundation of our ASIC and silicon platform by enabling high-quality, high-performance cell libraries.
Job Responsibilities
Characterize standard cells for advanced technology nodes.
Generate Liberty (NLDM/CCS/ECSM) timing, power, and noise models.
Drive methodology improvement to achieve accurate and self-consistent characterization with reasonable runtime.
Develop automation and analysis scripts in Python or Perl.
Interface with design, physical implementation, and CAD teams to ensure library quality and smooth integration.
Perform silicon correlation and validation of characterized models as needed.
Qualifications
Bachelor’s or advanced degree in a related field.
Minimum 3+ years of experience in standard cell library characterization.
Experience with Liberate or PrimeLib.
Strong command of SPICE simulations and Liberty model generation.
Strong scripting ability in Python, Perl, or TCL.
Understanding of advanced node design challenges (e.g., 7nm, 5nm, 3nm).
Knowledge of standard cell design and physical layout.
Familiarity with library QA methodologies.
Deep understanding of power analysis, variation‑aware characterization and LVF methodology.
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Standard Cell Characterization Engineer Location:
Santa Clara, CA / Bengaluru, India / Taipei, Taiwan Position Type:
Full-Time
About Us Auradine is a fast-growing, well-funded startup building scalable, sustainable, and secure infrastructure for blockchain and AI applications. Founded 2022 and backed by top-tier investors, our team includes veterans from Palo Alto Networks, Marvell, Intel, Google, and other leading tech companies. We are headquartered in Santa Clara, CA.
Role Overview You will own the cell characterization flow in Auradine and play a critical role in building the foundation of our ASIC and silicon platform by enabling high-quality, high-performance cell libraries.
Job Responsibilities
Characterize standard cells for advanced technology nodes.
Generate Liberty (NLDM/CCS/ECSM) timing, power, and noise models.
Drive methodology improvement to achieve accurate and self-consistent characterization with reasonable runtime.
Develop automation and analysis scripts in Python or Perl.
Interface with design, physical implementation, and CAD teams to ensure library quality and smooth integration.
Perform silicon correlation and validation of characterized models as needed.
Qualifications
Bachelor’s or advanced degree in a related field.
Minimum 3+ years of experience in standard cell library characterization.
Experience with Liberate or PrimeLib.
Strong command of SPICE simulations and Liberty model generation.
Strong scripting ability in Python, Perl, or TCL.
Understanding of advanced node design challenges (e.g., 7nm, 5nm, 3nm).
Knowledge of standard cell design and physical layout.
Familiarity with library QA methodologies.
Deep understanding of power analysis, variation‑aware characterization and LVF methodology.
#J-18808-Ljbffr