Quix Recruitment Group Ltd
RTL Design Engineer
Quix Recruitment Group Ltd, San Francisco, California, United States, 94199
Our client is a world‑leading technology company driving innovation in high‑performance semiconductor and SoC design. Their work powers billions of devices globally, delivering cutting‑edge performance, efficiency, and functionality across complex hardware systems.
They are seeking an RTL Design Engineer to join their hardware development team. This role is critical for translating architectural specifications into robust, synthesizable RTL designs and collaborating across architecture, verification, physical design, and validation teams to deliver next‑generation ASIC/SoC systems.
What You’ll Do
Translate architectural specifications into efficient and synthesizable RTL designs (SystemVerilog). Develop detailed microarchitecture specifications for functional blocks or subsystems. Integrate IP blocks and ensure seamless connectivity and data flow across the SoC. Run design checks (lint, CDC, synthesis readiness) and support backend implementation. Collaborate with verification teams to define test plans, review coverage, and debug design issues. Support validation and bring-up teams during silicon bring‑up and debug phases. Optimize designs for power, area, and timing while maintaining functional integrity. Requirements
B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or related field. 3+ years of experience in digital logic or RTL design for ASIC/SoC projects. Strong proficiency in SystemVerilog. Solid understanding of digital design fundamentals (FSMs, pipelining, arbitration, clock/reset domain handling, etc.). Experience with EDA tools for simulation, synthesis, and linting (e.g., Synopsys, Cadence, Mentor). Familiarity with low‑power design techniques, timing analysis, and interface protocols (e.g., AXI, AMBA, PCIe, DDR). Excellent problem‑solving skills, attention to detail, and ability to work in a cross‑functional environment. Preferred Qualifications
Experience with SoC-level integration and debug. Knowledge of scripting languages (Python, Perl, or Tcl) for automation. Exposure to FPGA prototyping or emulation environments. Understanding of hardware/software interaction and system‑level architecture. Why This Role Matters
This position is central to delivering high‑performance, reliable digital hardware at global scale. You will have the opportunity to shape RTL designs, collaborate with multiple cross‑functional teams, and contribute to projects that impact millions of devices worldwide. The role offers both technical depth and exposure to next‑generation semiconductor innovations.
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Translate architectural specifications into efficient and synthesizable RTL designs (SystemVerilog). Develop detailed microarchitecture specifications for functional blocks or subsystems. Integrate IP blocks and ensure seamless connectivity and data flow across the SoC. Run design checks (lint, CDC, synthesis readiness) and support backend implementation. Collaborate with verification teams to define test plans, review coverage, and debug design issues. Support validation and bring-up teams during silicon bring‑up and debug phases. Optimize designs for power, area, and timing while maintaining functional integrity. Requirements
B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or related field. 3+ years of experience in digital logic or RTL design for ASIC/SoC projects. Strong proficiency in SystemVerilog. Solid understanding of digital design fundamentals (FSMs, pipelining, arbitration, clock/reset domain handling, etc.). Experience with EDA tools for simulation, synthesis, and linting (e.g., Synopsys, Cadence, Mentor). Familiarity with low‑power design techniques, timing analysis, and interface protocols (e.g., AXI, AMBA, PCIe, DDR). Excellent problem‑solving skills, attention to detail, and ability to work in a cross‑functional environment. Preferred Qualifications
Experience with SoC-level integration and debug. Knowledge of scripting languages (Python, Perl, or Tcl) for automation. Exposure to FPGA prototyping or emulation environments. Understanding of hardware/software interaction and system‑level architecture. Why This Role Matters
This position is central to delivering high‑performance, reliable digital hardware at global scale. You will have the opportunity to shape RTL designs, collaborate with multiple cross‑functional teams, and contribute to projects that impact millions of devices worldwide. The role offers both technical depth and exposure to next‑generation semiconductor innovations.
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