Senior ASIC Verification Engineer – UVM/RTL Lead (Relocation)

A semiconductor solutions company based in Milpitas, CA, is seeking a Sr Design Verification Engineer to oversee verification methodologies and collaborate with design teams to ensure compliance with project specifications. The ideal candidate will possess a BS/MS in Computer Science or Electrical Engineering and have 5-10+ years of experience in high volume IC production, including strong UVM capabilities and proficiency in programming languages like Perl and Python. This role offers a competitive compensation of $150,000 to $160,000 annually. #J-18808-Ljbffr