PageBolt WordPress
Senior Analog Design Engineer – 20+ GHz Data Converters
PageBolt WordPress, San Francisco, California, United States, 94199
A technology firm specializing in high-performance electronics is searching for a Senior/Staff Analog Design Engineer to architect and design ultra-high-speed CMOS ADCs and DACs. Ideal candidates will have over 7 years of experience, and proficiency with design tools like Cadence Virtuoso. The role offers a competitive salary range of $194,000 – $270,000, plus stock options and various benefits including health stipends and 401(k) plans. This position is based in California, near San Francisco.
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